P89C669BBD Ver la hoja de datos (PDF) - Philips Electronics
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P89C669BBD
Philips Electronics
P89C669BBD Datasheet PDF : 33 Pages
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Philips Semiconductors
P89C669
80C51 8-bit microcontroller family with extended memory
Table 9: AC electrical characteristics…continued
Tamb = 0 °C to +70 °C for commercial unless otherwise specified. Formulae including tCLCL assume oscillator signal with
50/50 duty cycle.[1][2][3]
Symbol Figure Parameter
4.5 V < VDD < 5.5 V
Variable clock[4]
Min
Max
fOSC = 24 MHz[4]
Min Max
Unit
tQVWX
7
tWHQX
7
tQVWH
7
tRLAZ
6
tWHLH
6, 7
External Clock
Data valid to WR transition
Data hold after WR
Data valid to WR HIGH
RD LOW to address float
RD or WR HIGH to ALE HIGH
0.5tCLCL − 15 -
5
-
ns
0.5tCLCL − 11 -
9
-
ns
3.5tCLCL − 10 -
135
-
ns
-
0
-
0
ns
0.5tCLCL − 11 0.5tCLCL + 10 9
30
ns
tCHCX
9
tCLCX
9
tCLCH
9
tCHCL
9
Shift Register
HIGH time
LOW time
Rise time
Fall Time
16
tCLCL − tCLCX 16
-
ns
16
tCLCL − tCHCX 16
-
ns
-
4
-
4
ns
-
4
-
4
ns
tXLXL
8
tQVXH
8
tXHQX
8
tXHDX
8
tXHDV
8
Serial port clock cycle time
6tCLCL
Output data set-up to clock rising edge 5tCLCL − 10
Output data hold after clock rising edge tCLCL − 15
Input data hold after clock rising edge 0
Clock rising edge to input data valid -
-
250
-
ns
-
198
-
ns
-
26
-
ns
-
0
-
ns
5tCLCL − 35
-
173
ns
[1] Parameters are valid over operating temperature range unless otherwise specified.
[2] Load capacitance for port 0, ALE, and PSEN = 100 pF, load capacitance for all other outputs = 80 pF.
[3] Interfacing the microcontroller to devices with float times up to 45 ns is permitted. This limited bus contention will not cause damage to
Port 0 drivers.
[4] Parts are tested down to 2 MHz, but are guaranteed to operate down to 0 Hz.
9397 750 12299
Product data
Rev. 02 — 13 November 2003
© Koninklijke Philips Electronics N.V. 2003. All rights reserved.
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