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P89C669BBD Ver la hoja de datos (PDF) - Philips Electronics

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P89C669BBD Datasheet PDF : 33 Pages
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Philips Semiconductors
P89C669
80C51 8-bit microcontroller family with extended memory
9. Static characteristics
Table 8: DC electrical characteristics
Tamb = 0 °C to +70 °C for commercial, unless otherwise specified; VDD = 4.5 V to 5.5 V unless otherwise specified.
Symbol Parameter
Conditions
Min
Typ[1] Max
VIL
LOW-level input voltage
VIH
HIGH-level input voltage
(ports 0, 1, 2, 3, 4, EA)
0.5
-
0.2VDD + 0.9 -
0.2VDD 0.1
VDD + 0.5
VIH1
HIGH-level input voltage,
XTAL1, RST
0.7VDD
-
VDD + 0.5
VOL
LOW-level output voltage, VDD = 4.5 V; IOL = 1.6 mA
-
ports 1, 2, 3, 4[8]
-
0.4
VOL1 LOW-level output voltage, VDD = 4.5 V; IOL = 3.2 mA
-
port 0, ALE, PSEN[7][8]
-
0.4
VOH
HIGH-level output voltage, VDD = 4.5 V; IOH = 30 A
VDD 0.7
-
-
ports 1, 2, 3, 4
VOH1
HIGH-level output voltage
(port 0 in external bus
mode), ALE[9], PSEN[3]
VDD = 4.5 V;
IOH = 3.2 mA
VDD 0.7
-
-
IIL
Logical 0 input current,
VIN = 0.4 V
ports 1, 2, 3, 4
1
-
75
ITL
Logical 1-to-0 transition
4.5 V < VDD < 5.5 V;
[4] -
current, ports 1, 2, 3, 4[8]
VIN = 2.0 V
IL1
Input leakage current, port 0 0.45 < VIN < VDD 0.3
-
ICC
Power supply current
[5] -
Active mode[5]
VDD = 5.5 V
-
Idle mode[5]
-
Power-down mode or clock
-
stopped (see Figure 13 for
conditions)
-
650
-
±10
-
-
-
7 + 2.7 × fosc[MHz]
-
4 + 1.3 × fosc[MHz]
20 100
RRST
Internal reset pull-down
resistor
40
-
225
C10
Pin capacitance[10]
(except EA)
-
-
15
Unit
V
V
V
V
V
V
V
µA
µA
µA
mA
mA
µA
k
pF
[1] Typical ratings are not guaranteed. The values listed are at room temperature (+25 ˚C), 5 V, unless otherwise stated.
[2] Capacitive loading on ports 0 and 2 may cause spurious noise to be superimposed on the VOL of ALE and ports 1, 3 and 4. The noise is
due to external bus capacitance discharging into the Port 0 and Port 2 pins when these pins make 1-to-0 transitions during bus
operations. In the worst cases (capacitive loading >100 pF), the noise pulse on the ALE pin may exceed 0.8 V. In such cases, it may be
desirable to qualify ALE with a Schmitt Trigger, or use an address latch with a Schmitt Trigger STROBE input. IOL can exceed these
conditions provided that no single output sinks more than 5 mA and no more than two outputs exceed the test conditions.
[3] Capacitive loading on ports 0 and 2 may cause the VOH on ALE and PSEN to momentarily fall below the VDD 0.7 V specification when
the address bits are stabilizing.
[4] Pins of ports 1, 2, 3 and 4 source a transition current when they are being externally driven from ‘1’ to ‘0’. The transition current reaches
its maximum value when VIN is approximately 2 V for 4.5 V < VDD < 5.5 V.
[5] See Figure 10 through Figure 13 for ICC test conditions. fosc is the oscillator frequency in MHz.
[6] This value applies to Tamb = 0 °C to +70 °C.
[7] Load capacitance for port 0, ALE, and PSEN = 100 pF, load capacitance for all other outputs = 80 pF.
[8] Under steady state (non-transient) conditions, IOL must be externally limited as follows:
a) Maximum IOL per port pin: 15 mA
b) Maximum IOL per 8-bit port: 26 mA
9397 750 12299
© Koninklijke Philips Electronics N.V. 2003. All rights reserved.
Product data
Rev. 02 — 13 November 2003
18 of 33

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