82B96 Ver la hoja de datos (PDF) - Philips Electronics
Número de pieza
componentes Descripción
Fabricante
82B96 Datasheet PDF : 16 Pages
| |||
Philips Semiconductors
Dual bi-directional bus buffer
Product data
P82B96
CALCULATING SYSTEM DELAYS AND BUS CLOCK FREQUENCY FOR A FAST MODE SYSTEM
LOCAL MASTER BUS
VCCM
MASTER
SCL
VCCB
Rm
BUFFERED EXPANSION BUS
Rb
Sx P82B96 Tx/Rx
Tx/Rx P82B96 Sx
REMOTE SLAVE BUS
VCCS
Rs
SCL
SLAVE
I2C
GND/0 V
Cm = MASTER BUS
CAPACITANCE
Cb = BUFFERED BUS
WIRING CAPACITANCE
Cs = SLAVE BUS
CAPACITANCE
A) FALLING EDGE OF SCL AT MASTER IS DELAYED BY THE BUFFERS AND BUS FALL TIMES
EFFECTIVE DELAY OF SCL AT SLAVE = 255 + 17 VCCM + (2.5 + 4 × 109 Cb) VCCB (ns) C = F, V = VOLTS
Figure 6.
LOCAL MASTER BUS
VCCM
MASTER
SCL
VCCB
Rm
BUFFERED EXPANSION BUS
Rb
Sx
Tx/Rx
P82B96
Tx/Rx
I2C
su01787
I2C
GND/0 V
Cm = MASTER BUS
CAPACITANCE
Cb = BUFFERED BUS
WIRING CAPACITANCE
B) RISING EDGE OF SCL AT MASTER IS DELAYED (CLOCK STRETCH) BY BUFFER AND BUS RISE TIMES
EFFECTIVE DELAY OF SCL AT MASTER = 270 + RmCm + 0.7RbCb (ns), C = F, R = Ω
Figure 7.
su01788
2004 Mar 26
9
Share Link: 