AC Test Conditions
Input Pulse Levels
Input Rise and Fall Time
Input and Output Timing Reference Levels
Output Load
0.4V to 2.4V
5 ns
1.5V
See Figures 1 and 2
LP62S1024B-I Series
TTL
TTL
CL
30pF
* Including scope and jig.
Figure 1. Output Load
CL
5pF
* Including scope and jig.
Figure 2. Output Load for tCLZ1,
tCLZ2, tOHZ, tOLZ, tCHZ1,
tCHZ2, tWHZ, and tOW
Data Retention Characteristics (TA = -40°C to 85°C)
Symbol
VDR1
VDR2
Parameter
VCC for Data Retention
Min.
1.5
1.5
Max.
3.6
3.6
ICCDR1
Data Retention Current
-
1*
ICCDR2
-
1*
tCDR
Chip Disable to Data Retention Time
0
-
tR
Operation Recovery Time
5
-
* LP62S1024B-45LLI/55LLI/70LLI ICCDR: max. 1μA at TA = 0°C to + 40°C
Unit
Conditions
V
CE1 ≥ VCC - 0.2V
V
CE2 ≤ 0.2V,
VCC = 1.5V,
μA
CE1 ≥ VCC - 0.2V,
VIN ≥ 0V
VCC = 1.5V,
μA
CE2 ≤ 0.2V,
VIN ≥ 0V
ns
See Retention Waveform
ms
(December, 2008, Version 1.4)
10
AMIC Technology, Corp.