NM93C66 Ver la hoja de datos (PDF) - Fairchild Semiconductor

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NM93C66

4096-Bit Serial CMOS EEPROM (MICROWIRE™ Synchronous Bus)

Fairchild Semiconductor 

Timing Diagrams (Continued)

WRITE DISABLE CYCLE (WDS)

tCS

CS

SK

1 0 0 A7 A6

A1 A0

DI

Start Opcode

Address

Bit Bits(2)

Bits(8)

High - Z

DO

93C66:

Address bits pattern -> 0-0-x-x-x-x-x-x; (x -> Don't Care, can be 0 or 1)

WRITE CYCLE (WRITE)

tCS

CS

SK

1 0 1 A7

DI

Start Opcode

Bit Bits(2)

DO

93C66:

Address bits pattern -> User defined

Data bits pattern -> User defined

A6

A1

Address

Bits(8)

A0 D15 D14

D1 D0

High - Z

Data

Bits(16)

tWP

Ready

Busy

WRITE ALL CYCLE (WRALL)

tCS

CS

SK

1 0 0 A7 A6

A1 A0 D15 D14

D1 D0

DI

Start Opcode

Address

Data

Bit Bits(2)

Bits(8)

Bits(16)

High - Z

DO

93C66:

Address bits pattern -> 0-1-x-x-x-x-x-x; (x -> Don't Care, can be 0 or 1)

Data bits pattern -> User defined

tWP

Ready

Busy

NM93C66 Rev. E

9

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