NJU8714 Ver la hoja de datos (PDF) - Japan Radio Corporation
Número de pieza
componentes Descripción
Fabricante
NJU8714 Datasheet PDF : 7 Pages
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NJU38575154
FUNCTIONAL DESCRIPTION
(1) Signal Output
The OUT1/1X and OUT2/2X generate respectively L-channel and R-channel output signals, which will be
converted to analog signals via external 2nd-order or higher LC filter. A switching regulator with a high response
against a voltage fluctuation is the best selection for the VDDO1 and VDDO2, which are the power supply for output
drivers. To obtain better T.H.D. performance, the stabilization of the power is required.
(2) Master Clock (MCK)
Input 1-bit audio signals such as PWM or PDM to the DIN1 and DIN2 pins. By setting the SEL pin to ”H”, master
clock (MCK) synchronizes the audio signal inputs (DIN1 and DIN2). In case of “SEL” = “L”, input signals go into the
amplifier circuits by own timing. Therefore, it requires careful design of PCB patterns from DSP to NJU8714.
The setup time and the hold time should be kept in the AC characteristics because DIN1 and DIN2 are fetched with
the rising edge of MCK. MCK requires jitter-free or jitter as small as possible because the jitter downs S/N ratio.
(3) Power Supply
VDD : Power supply for input part.
VG : Power supply for control logic and pre-driver which drives the transistor gates of output drivers.
It requires much higher power supply voltage than VDDO1 and VDDO2 for better T.H.D..
VDDO1, VDDO2 : Power supply for output drivers.
(4) Output Control
Output circuit is selected by the conditions of STBYB, HALTB, SEL, DIN1, DIN2 and MCK.
STBYB HALTB
SEL
DIN1, DIN2
MCK
OUT1
L
H
L
*
*
*
*
*
*
VSSO
L
H
*
*
*
Hi-z
L
H
H
H
L
H
L
H
*
VSSO
VDDO1
VSSO
VDDO1
*Don’t care
BEEP circuit is operated regardless of STBYB and HALTB.
OUT2
VSSO
Hi-z
VSSO
VDDO2
VSSO
VDDO2
OUT1X
VSSO
Hi-z
VDDO1
VSSO
VDDO1
VSSO
OUT2X
VSSO
Hi-z
VDDO2
VSSO
VDDO2
VSSO
(5) Input Signal Synchronization Function
DIN1 and DIN2 are synchronized with master clock by setting SEL pin to ”H”.
By setting SEL pin to ”L”, DIN1 and DIN2 are asynchronous with master clock.
(6) Output Driver Control Function
By setting HALTB pin to ”L”, high side output drivers become OFF and Low side output drivers become ON,
then both of OUT1/1X and OUT2/2X output VSSO level signals. This function works regardless of STBYB pin
setting.
(7) Standby Control Function
By setting STBYB pin to ”L”, the NJU8714 becomes standby condition. During standby condition, by setting
HALTB to ”L”, OUT1/1X and OUT2/2X become VSSO, and by setting HALTB pin to ”H”, OUT1/1X and OUT2/2X
become Hi-z.
To save the power supply current at standby, MCK requires ”L” level.
Ver.2004-05-21
-3-
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