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NJU8714

STEREO BTL OUTPUTS SWITCHING DRIVER FOR Class D AMPLIFIER

Japan Radio Corporation  

NJU8714

TERMINAL DESCRIPTION

No.

SYMBOL

I/O

FUNCTION

1

MCK

I Master Clock Input Terminal

2

VSS

- Power GND: VSS=0V (Note.1)

3

HALTB

I Output Driver Control Terminal

4

5

6

7

8,13

9

10

11

12

14

15

16

17

18

DIN1

BEEPIN

OBEEP1

OUT1

VSSO

OUT1X

VDDO1

VDDO2

OUT2X

OUT2

OBEEP2

VG

DIN2

STBYB

I 1bit Data Input Terminal 1

I BEEP Signal Input Terminal

O BEEP Output terminal 1

O Positive Output Terminal 1

- Output GND terminal: VSS=0V (Note. 1)

O Negative Output 1

- Output Power supply 1(Note. 2)

- Output Power supply 2(Note. 2)

O Negative Output 2

O Positive Output Terminal 2

O BEEP Output terminal 2

- Pre-driver Power supply

I 1bit Data Input Terminal 2

I Standby control terminal (L:Standby)

19

SEL

I

Input Signal Synchronization With “MCK”

(H: Synchronous., L: Asynchronous.)

20

VDD

- Power Supply: VDD=2.5V

(Note. 1) Pin No.2(VSS), 8(VSSO) and 13(VSSO) should be connected at the nearest point to the IC.

(Note. 2) Pin No.10(VDDO1) and 11(VDDO2) should be connected at the nearest point to the IC.

INPUT TERMINAL STRUCTURE

VDD

Input Terminal

VSS

MCK, HALTB, DIN1, DIN2, BEEPIN, STBYB, SEL

-2-

Ver.2004-05-21

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