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NJU8710R

2V Operation Clock-less Switching Driver for Class D Amplifier

Japan Radio Corporation  

NJU8710

TERMINAL DESCRIPTION

No.

SYMBOL

I/O

Function

10

VDD

− Power Supply: VDD=2V

5

6

VDDO

− Output Power Supply: VDDO=2V

3

8

VSS

− Power GND and Output GND terminal: VSS=0V

2

9

IN1

IN2

I 1-bit Data Input Terminal

4

7

OUTX1

OUTX2

Output Terminal

O

OUTX1 terminal outputs the inverted signal of IN1 terminal, OUTX2

terminal outputs the inverted signal of IN2 terminal.

1

STBYB

I Standby Control Terminal (L:Standby)

*VSS(Terminal No.3,8) should be connected at a nearest point to the IC.

*VDDO(Terminal No.5,6) should be connected at a nearest point to the IC.

*STBYB(Terminal No.1) must be connected to VDD, when this function is not used.

INPUT TERMINAL STRUCTURE

VDD

Input

Terminal

VSS

IC Circuit

FUNCTIONAL DESCRIPTION

(1) Signal Output (OUTX1, OUTX2 Terminal)

Output signal becomes a inverted input signal. A flow-through current at the signal polarity transition doesn't

generate by optimized dead time control circuit. Output signal is converted to analog signal via external

2nd-order or higher LC filter.

A switching regulator with a high response against a voltage fluctuation is the best selection for the VDDO,

which is the power supply for output drivers. To obtain better T.H.D. performance, the stabilization of the power

is required.

(2) Standby Control Function

By setting the STBYB terminal to “L”, the NJU8710 becomes standby condition. During standby condition,

OUTX1 and OUTX2 are in Hi-Z.

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Ver.2004-06-02

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