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NJW1191 Ver la hoja de datos (PDF) - Japan Radio Corporation

Número de pieza
componentes Descripción
Fabricante
NJW1191
JRC
Japan Radio Corporation  JRC
NJW1191 Datasheet PDF : 20 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
NJW1191
!APPLICATION CIRCUIT
C25 100µF
+
1
C1 10µF
+2
C2 1µF
3
+
C3 1µF
+4
C4 1µF
+5
C5 1µF
+6
C6 470pF
7
C7 100nF
R1 39k
8
R2 4.7k
C8 4.7nF
9
C9 100nF
10
R3 2.2k
C10 4.7µF
+ 11
GND
VREF
MASTER
VOLUME
& LOUDNESS
TONE
CONTROL
BIAS
V+
MASTER
VOLUME
& LOUDNESS
TONE
CONTROL
32
+9V
31
C2+4 1µF
30
C23 1µF
+
29
C22
+
1µF
28
C2+1 1µF
27
C21 470pF
26
R8 39kC20 100nF
25
R7 4.7k
C19 4.7nF
24
C18 100nF
23
C17 4.7µF
22 +
R6 2.2k
+ 12
C11 1µF
13
C12 10µF
14
+
C13 10µF
+ 15
R4 100
16
FRONT
VOLUME
REAR
VOLUME
SCL
I2C BUS
INTERFACE
FRONT
VOLUME
REAR
VOLUME
SDA
21
+
C16 1µF
20
C+15 10µF
19
C+14 10µF
18
R5 100
17
!APPLICATION NOTES
Pin No.
Function
Note
2
VREF
C1 can be adjusted rise and fall time of reference voltage at power on and off. Take care that the reduced C1makes
sensitive to ripple of power supply.
3 - 6, 27 -30 Inputs
The Input impedance is designed about 48k ohms. The ground line should be inserted between each input lines to
avoid cross talk.
7,8,25,26
Loudness filter
Taps
Loudness frequency can be adjusted with external parts(See page 6) . Especialy, 8 and 25 pins should be kept from
large signal lines such as digital signal lines or the other sound signal lines to avoid digitaly noise or cross talk in
Loudness mode.
9,10,11,22,23, Tone filter
24
terminals
Tone Bass and Treble cut off frequency can be adjusted with external parts(See page6). These pins should be kept
from large signal lines such as digital signal lines or the other sound signal lines to avoid the digitaly noise or cross
talk.
12,21
Tone outputs Output impedance is designed about 50 ohms.
13,20
Balance Fedar
volume inputs
Input impedance is designed about 24k ohms.
14,15,18,19
Balance Fedar
volume
Output impedance is designed about 50 ohms.
outputs
16,17
I2C control
signal ports
These terminals should be inserted resistance about 100 ohms between terminal and signal source to reduce the
digitaly noise. These lines should be kept from analog signal lines and or near by the chip to avoid digitaly noise.
Inserted ground line between analog line and digital line should be recommended.
–5–

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