NJU6679 Ver la hoja de datos (PDF) - Japan Radio Corporation
Número de pieza
componentes Descripción
Fabricante
NJU6679 Datasheet PDF : 46 Pages
| |||
NJU6679
No
13
12
3
Symbol
RD(E)
WR(R-
W)
I/O
Function
I <In case of 80 Type MPU>
RD signal of 80 type MPU input terminal. Active "L"
During this signal is "L" , D0 to D7 terminals are output.
<In case of 68 Type MPU>
Enable signal of 68 type MPU input terminal. Active "H"
I <In case of 80 Type MPU>
Connect to the 80 type MPU WR signal. Actie "L".
The data on the data bus input syncronizing the rise edge of this signal.
<In case of 68 Type MPU>
The read/write control signal of 68 type MPU input terminal.
R/W
State
H
Read
L
Write
SEL68
I MPU interface type selection terminal.
SEL68
H
L
S tate
68 Type 80 Type
2
P/S
8
OSC1
9
OSC2
41 to 104 C0 to
C63
105 to 236 S0
toS131
I serial or parallel interface selection terminal.
P/S
Chip Select Data/Command Data
Read/Write serial Clock
"H"
CS
A
D0 to D7 RD,WR
-
"L"
CS
A0
SI(D7) Write Only SCL(D6)
RAM data and status read operation do not work in mode of
the serial interface.
In case of the serial interface (P/S="L"),RD and WR must be fixed
"H" or "L", and D0 to D5 are high impedance.
I System clock input terminal for Maker testing.(This terminal should be Open)
For external clock operation, the clock shoud be input to OSC1 terminal.
O LCD driving signal output terminals.
Segmet output terminals:S 0 to S131
Common output terminals:C 0 to C127
Segment output terminal
The following output voltages are selected by the combination of FR and data
in the RAM.(non of the n-line inverse functions)
O
RAM
Data
FR
Output Voltage
Normal
Reverse
H
VDD
V2
H
L
V5
V3
H
V2
L
L
V3
VDD
V5
237 to 300 C64 to
C127
Common output terminal
The following output voltages are selected by the combination of FR and status
O of common.
Scan data FR
H
H
L
H
L
L
Output Voltage
V5
VDD
V1
V4
Share Link: 