NE5037 Ver la hoja de datos (PDF) - Philips Electronics
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NE5037 Datasheet PDF : 8 Pages
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Philips Semiconductors Linear Products
6-Bit A/D converter (parallel outputs)
Product specification
NE5037
ABSOLUTE MAXIMUM RATINGS
SYMBOL
PARAMETER
VCC
VREF
VIN(Analog)
VIN(Digital)
DOUT
Power supply voltage
Reference voltage
Analog input voltage
Digital input voltage (CS, OE, START, CLK)
Data outputs (DB0 to DB5)
3-state mode
Enabled mode (each output)
EOC
End of conversion
∆GND
TA
TSTG
TSOLD
PD
Analog GND to digital GND
Operating temperature range
Storage temperature range
Lead soldering temperature (10 seconds)
Maximum power dissipation, TA=25°C (still-air)1
N package
NOTES:
1. Derate above 25°C at the following rates:
N package=11.6mW/°C
RATING
7
7
7
7
7
5
VCC
±1
0 to 70
-65 to 150
300
1450
UNIT
V
V
V
V
V
mA
V
°C
°C
°C
mW
DC ELECTRICAL CHARACTERISTICS
VCC=5.0V; VREF=2.0V; Clock=1MHz; 0°C ≤ TA ≤ 70°C unless otherwise specified. Typical values are specified at 25°C
SYMBOL
PARAMETER
TEST CONDITIONS
LIMITS
Min
Typ Max
UNIT
Resolution
6
6
6
Bits
Relative accuracy1,2
1/4
1/2
LSB
VCC
Positive supply voltage
+4.75 +5.0 +5.50
V
εFS
Full-scale gain error2,3,4
εZS
Zero-scale offset error2
VREF=2.0V, TA=25°C
VREF=2.0V, TA=25°C
±1
±2
LSB
±1/2 -1/2, +2 LSB
PSR
Power supply rejection, Max change in full-scale2
VREF=2.0V, 4.75V≤VCC≤5.5V
±1/2
±1
LSB
IIN
Analog input bias current
0≤VIN≤2.5V
1
10
µA
IREF
Reference bias current
0≤VREF≤2.5V
1
10
µA
RIN
Analog input resistance
3
30
MΩ
VIH
Logic ”1’ input voltage
2.0
V
VIL
Logic ”0’ input voltage
0.8
V
IIH
Logic ”1’ input current
10
µA
IIL
Logic ”0’ input current
1
10
µA
IOH
Logic ”1’ output current5
IOL
Logic ”0’ output current5
2.4V≤VOH
300
µA
VOL≤0.4V
1.6
mA
IOZ
3-State leakage current
±0.1
±40
µA
ICC
Positive supply current
18
24
mA
PD
Power dissipation
132
mW
NOTES:
1. Relative accuracy is defined as the deviation of the code transition points from the ideal code transition points on a straight line drawn from
zero-scale to full-scale of the device.
2. Specifications given in LSBs refer to the weight of the least significant bit at the 6-bit level which is 1.56% of the full-scale voltage.
3. Full-scale gain error is the deviation of the full-scale code transition point (111110 to 111111) from its ideal value.
4. The analog input voltage (VIN) range is 0V to VREF nominally, with the output remaining at 111111 even though the input may increase from
VREF to VCC. (For optimum performance, VREF can be any value from 1.5V to 2.5V.)
5. The data outputs have active pull-ups. The EOC line is open-collector with a nominal 5kΩ internal pull-up resistor.
August 31, 1994
583
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