NCV7380(2004) Ver la hoja de datos (PDF) - ON Semiconductor

Número de pieza

componentes Descripción

Fabricante

NCV7380
(Rev.:2004)

LIN Transceiver

ON Semiconductor 

NCV7380

tBit

tBit

TxD

100%

VSUP

BUS

58.1%

28.4%

0%

GND

tdom(max)

tdom(min)

trec(min)

74.4%

42.2%

58.1%

trec(max)

28.4%

RxD

Figure 8. Duty Cycle Measurement and Calculation in Accordance to LIN Physical Layer Specification 2.0

Duty Cycle Calculation

With the timing parameters shown in Figure 8 two duty

cycles, based on trec(min) and trec(max) can be calculated as

follows:

D1* = trec(min)/(2 x tBit)

D2* = trec(max)/(2 x tBit)

For proper operation at 20 KBit/s (bit time is 50 ms) the

LIN driver has to fulfill the duty cycles specified in the AC

characteristics for supply voltages of 7...18 V and the three

defined standard loads.

Due to this simple definition there is no need to measure

slew rates, slope times, transmitter delays and dominant

voltage levels as specified in the LIN physical layer

specification 1.3.

The devices within the D1/D2 duty cycle range also

operates in applications with reduced bus speed of

10.4 KBit/s or below.

In order to minimize EME, the slew rates of the

transmitter can be reduced (by up to [ 2 times). Such

devices have to fulfill the duty cycle definition D3/D4 in

the LIN physical layer specification 2.0. Devices within

this duty cycle range cannot operate in higher frequency

20 KBit/s applications.

*D1 and D2 are defined in the LIN protocol specification 2.0.

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