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NCV7361A

Voltage Regulator with Integrated LIN Transceiver

ON Semiconductor 

NCV7361A

ELECTRICAL CHARACTERISTICS ( VSUP = 7.0 V to 18 V; BUS loads: 1.0 k / 1 nF; 660 / 6.8 nF; 500 / 10 nF, TxD Signal:

tBit = 50 ms, twH = TwL = tBit; trise = tfall < 100 ns, −40°C ≤ TA ≤ 125°C unless otherwise noted)

Characteristic

Symbol

Condition

Min

Typ

Max

LIN BUS PARAMETER ACCORDING TO LIN SPEC. REV. 2.0

Minimal Recessive Bit Time (Notes 15 and 16)

trec(min)

−

40

50

58

Maximum Recessive Bit Time (Notes 15 and 16)

trec(max)

−

40

50

58

Duty Cycle 1

D1

D1 = trec(min) / (2 * tBit)

0.396

−

−

Duty Cycle 2

D2

D2 = trec(max) / (2 * tBit)

−

−

0.581

15. See Timing Diagrams.

16. See Test Circuits for Dynamic and Static Characteristics.

TIMING DIAGRAMS

Unit

ms

ms

TxD

50%

VBUS

tdf_TxD

95%

100%

tdr_TxD

BUS

50%

50%

RxD

VBUS

BUS

0%

50%

tdf_RxD

5%

tdr_RxD

Figure 2. Timing Diagram for Propagation Delay

According to LIN 1.3 and 2.0

100%

95%

60%

40%

5%

0%

Vdom

tsdom

tsrec

Figure 3. Timing Diagram for Slope Times

According to LIN 1.3

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