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Fabricante

NCV7361

Voltage Regulator with Integrated LIN Transceiver

ON Semiconductor 

NCV7361A

VSUP

BUS

60%

50%

40%

RxD

Vthr_max

Vthr_hys Vthr_cnt

Vthr_min

t < tdeb_BUS

t < tdeb_BUS

Figure 18. Receive Mode Impulse Diagram

The receive threshold values Vthr_max and Vthr_min are

symmetrical to 0.5*VSUP with a hysteresis of 0.135*VSUP.

The LIN specific receive threshold is between 0.4*VSUP

and 0.6 * VSUP.

Data Rate

The NCV7361A is a constant slew rate transceiver. The

bus driver works with a fixed slew rate range of 1.0 V/ms

v DV/DT v 2.5 V/ms. This principle provides good

symmetry of the slope times between recessive to dominant

and dominant to recessive slopes within the LIN bus load

range (CBUS, Rterm).

The NCV7361A guarantees data rates up to 20 kb within

the complete bus load range under worst case conditions.

The constant slew rate principle holds appropriate voltage

levels and can operate within the LIN Protocol

Specification for RC oscillator systems with a matching

tolerance up to "2% between 2 nodes.

TxD Input

The 5.0 V input TxD directly controls the BUS level:

TxD = low → BUS = low (dominant level)

TxD = high → BUS = high (recessive level)

The TxD pin has an internal pullup resistor connected to

VOUT. This guarantees that an open TxD pin generates a

recessive BUS level.

MCU

VCC

IPU_TxD

RPU_TxD

VOUT

Typ.

15 k

RC Filter

(10 ns)

TxD

Figure 19. TxD Input Circuitry

NCV7361A

http://onsemi.com

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