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NCL30002 Ver la hoja de datos (PDF) - ON Semiconductor

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NCL30002
ON-Semiconductor
ON Semiconductor ON-Semiconductor
NCL30002 Datasheet PDF : 17 Pages
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NCL30002
Table 2. MAXIMUM RATINGS
Rating
Symbol
Value
Unit
MFP Voltage
VMFP
0.3 to 10
V
MFP Current
IMFP
±10
mA
COMP Voltage
VControl
0.3 to 6.5
V
COMP Current
IControl
2 to 10
mA
Ct Voltage
VCt
0.3 to 6
V
Ct Current
ICt
±10
mA
CS Voltage
VCS
0.3 to 6
V
CS Current
ICS
±10
mA
ZCD Voltage
VZCD
0.3 to 10
V
ZCD Current
IZCD
±10
mA
DRV Voltage
VDRV
0.3 to VCC
V
DRV Sink Current
IDRV(sink)
800
mA
DRV Source Current
IDRV(source)
500
mA
Supply Voltage
VCC
0.3 to 20
V
Supply Current
ICC
Power Dissipation (TA = 70°C, 2.0 Oz Cu, 55 mm2 Printed Circuit Copper Clad)
PD
±20
mA
450
mW
Thermal Resistance JunctiontoAmbient
(2.0 Oz Cu, 55 mm2 Printed Circuit Copper Clad)
JunctiontoAir, Low conductivity PCB (Note 3)
JunctiontoAir, High conductivity PCB (Note 4)
RqJA
RqJA
RqJA
°C/W
178
168
127
Operating Junction Temperature Range
TJ
40 to 125
°C
Maximum Junction Temperature
TJ(MAX)
150
°C
Storage Temperature Range
TSTG
65 to 150
°C
Lead Temperature (Soldering, 10 s)
TL
300
°C
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
1. This device series contains ESD protection and exceeds the following tests:
Pins 1– 8: Human Body Model 2000 V per JEDEC Standard JESD22A114E.
Pins 1– 8: Machine Model Method 200 V per JEDEC Standard JESD22A115A.
2. This device contains LatchUp protection and exceeds ± 100 mA per JEDEC Standard JESD78.
3. As mounted on a 40x40x1.5 mm FR4 substrate with a single layer of 80 mm2 of 2 oz copper traces and heat spreading area. As specified
for a JEDEC 51 low conductivity test PCB. Test conditions were under natural convection or zero air flow.
4. As mounted on a 40 x 40 x 1.5 mm FR4 substrate with a single layer of 650 mm2 of 2 oz copper traces and heat spreading area. As specified
for a JEDEC 51 high conductivity test PCB. Test conditions were under natural convection or zero air flow.
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