NBSG111(2007) Ver la hoja de datos (PDF) - ON Semiconductor
Número de pieza
componentes Descripción
Fabricante
NBSG111
(Rev.:2007)
(Rev.:2007)
ON Semiconductor
NBSG111 Datasheet PDF : 11 Pages
| |||
NBSG111
Table 9. AC CHARACTERISTICS VCC = 0 V; VEE = −3.465 V to −2.375 V or VCC = 2.375 V to 3.465 V; VEE = 0 V
−40°C
25°C
70°C
Symbol
Characteristic
Min Typ Max Min Typ Max Min Typ Max Unit
VOUTPP Output Voltage Amplitude
(See Figure 3) (Note 18)
fin < 3 GHz 305 420
305 420
305 420
mV
fin = 5.5 GHz 180 250
150 220
100 200
tPLH,
tPHL
Propagation Delay to Output Differential
Output Enable
Clock Select
250 300 350 250 300 350 250 300 350 ps
430 550 700 430 550 700 430 600 750
400 450 500 400 450 500 400 480 550
tSKEW
Duty Cycle Skew (Note 19)
Within−Device Skew (Note 20)
Device−to−Device Skew (Note 21)
2 15
5 20
15 85
2 15
5 20
15 85
2 15 ps
5 20
15 85
tS
tH
tJITTER
VINPP
Setup Time to CLK (EN to Selected CLK0:1)
110
Hold Time (EN to Selected CLK0:1)
110
RMS Random Clock Jitter(Figure 3)
(Note 23)
fin = 5 GHz
Peak−to−Peak Data Dependent Jitter
(Note 24)
fin = 5 Gb/s
Input Voltage Swing/Sensitivity
75
(Differential Configuration) (Note 22)
70
110
70
110
0.5 2.0
2600 75
70
115
70
115
0.5 2.0
14
2600 75
80
ps
80
ps
ps
0.5 2.0
2600 mV
tr
Output Rise/Fall Times (20% − 80%) @ 1 GHz
ps
tf
Q, Q 40 60 80 40 60 80 40 60 80
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
18. Measured using a 500 mV source, 50% duty cycle clock source. All outputs loaded with 50 W to VCC − 1.5 V. Input edge rates 40 ps
(20% − 80%).
19. tSKEW = |tPLH − tPHL| for a nominal 50% differential clock input waveform (Figure 4).
20. Within−Device skew is measured between outputs under identical transitions and conditions on any one device.
21. Device−to−Device skew for identical transitions at identical VCC levels.
22. VINPP (MAX) cannot exceed VCC − VEE (applicable only when VCC −VEE t 2600 mV).
23. Additive RMS jitter with 50% duty cycle clock signal at 5 GHz.
24. Additive Peak−to−Peak jitter with input NRZ data at PRBS 231−1 at 5 Gb/s.
http://onsemi.com
9
Share Link: