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NAND512R4M3 Ver la hoja de datos (PDF) - STMicroelectronics

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NAND512R4M3 Datasheet PDF : 23 Pages
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Summary description
NAND256-M, NAND512-M, NAND01G-M
Table 2.
Signal Names: NAND Flash & 1 x SDR LPSDRAM
NAND Flash
I/O0-I/O7
Data Inputs/Outputs for x8 devices
I/O8-I/O15
Data Inputs/Outputs for x16 devices
AL
Address Latch Enable
CL
Command Latch Enable
EF
Chip Enable
R
Read Enable
RB
Ready/Busy (open-drain output)
WF
Write Enable
WP
Write Protect
VDDF
VSSF
Supply Voltage
Ground
SDR LPSDRAM
A0-A12
Row Address: RA0-RA11
Column Address: CA0-CA8
Auto-precharge flag: A10
BA0-BA1
Bank Address
DQ0-DQ15
Data Inputs/Outputs
K
Clock Input
KE
Clock Enable Input
ED
WD
RAS
Chip Select inputs
Write Enable Input
Row Address Strobe Input
CAS
Column Address Strobe Input
DQM0
Upper DQ Mask Enable Output
DQM1
Lower DQ Mask Enable Output
VDDD
VDDQD
VSSD
VSSQD
NC
Supply Voltage
Input/Output Supply Voltage
Ground
Input/Output Ground
Not Connected Internally
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