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MX26L6419 Ver la hoja de datos (PDF) - Macronix International

Número de pieza
componentes Descripción
Fabricante
MX26L6419
MCNIX
Macronix International MCNIX
MX26L6419 Datasheet PDF : 45 Pages
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MX26L6419
FUNCTION
The device includes on-chip program/erase control cir-
cuitry. The Write State Machine (WSM) controls block
erase and word/page program operations. Operational
modes are selected by the commands written to the
Command User Interface (CUI). The Status Register in-
dicates the status of the WSM and when the WSM suc-
cessfully completes the desired program or block erase
operation.
A Powerdown mode is enabled when the RESET pin is
at GND minimizing power consumption.
READ
The device has three read modes, which accesses to
the memory array, the Device Identifier or the Status
Register independent of the VPEN voltage. The appro-
priate read command are required to be written to the
CUI. Upon initial device powerup or after exit from
powerdown, the device automatically resets to read ar-
ray mode. In the read array mode, low level input to CE
and OE, high level input to WE and RESET or low level
input to RESET, and address signals to the address in-
puts (A21-A0) output the data of the addressed location
to the data input/output (Q15~Q0).
When reading information in read array mode, the de-
vice defaults to asynchronous page mode. In this state,
data is internally read and stored in a high-speed page
buffer. A2:0 addresses data in the page buffer. The page
size is 8 words. Asynchronous word mode is supported
with no additional commands required.
OUTPUT DISABLE
When OE is at VIH, output from the devices is disabled.
Data input/output are in a high-impedance(High-Z) state.
STANDBY
When CE disable the device (see table1) and place it in
standby mode. The power consumption of this device is
reduced. Data input/output are in a high-impedance(High-
Z) state. If the memory is deselected during block erase,
program or lock-bit configuration, the internal control cir-
cuits remain active and the device consume normal ac-
tive power until the operation completes.
POWER-DOWN
When RESET pin is at VIL, the device is in the power-
down mode and its power consumption is substantially
low around 25uA. During read modes, the memory is
deselected and the data input/output are in a high-
impedance(High-Z) state. To return from power down
mode requires RESET pin at VIH. After return from
powerdown, the CUI is reset to Read Array , and the
Status Register is set to value 80H.
During block erase program or lock-bit configuration
modes, RESET pin at VIL will abort either operation.
Memory array data of the block being altered become
invalid.
Time tPHWL is required after RESET goes to logic-high
(VIH) before another command can be written.
WRITE
Writes to the CUI enables reading of memory array data,
device identifiers and reading and clearing of the Status
Register and when VPEN=VPENH block erasure pro-
gram and lock-bit configuration. The CUI is written when
the device is enable, WE is active and OE is at high
level. Address and data are latched on the earlier rising
edge of WE and CE. Standard micro-processor write tim-
ings are used.
READ QUERY
The read query operation outputs block status informa-
tion, CFI (Common Flash Interface) ID string, system
interface information, device geometry information and
MXIC extended query information.
P/N:PM0946
REV. 0.3, OCT. 08, 2003
6

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