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MX26C1000A Datasheet PDF : 16 Pages
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MX26C1000A
FUNCTIONAL DESCRIPTION
When the MX26C1000A is delivered, or it is erased, the
chip has all 1000K bits in the "ONE", or HIGH state.
"ZEROs" are loaded into the MX26C1000 through the
procedure of programming.
PROGRAMMING MODE
PROGRAMMING ALGORITHM
The MX26C1000A is programmed by an EPROM
programmer or on-board. The device is set up in the
programming mode when the programming voltage VPP
= 12.75V is applied, with VCC = 5 V and PGM = VIH
(Algorithm shown in Figure 1). Programming is achieved
by applying a single TTL low level 25us pulse to the PGM
input after addresses and data lines are stable. If the
data is not verified, additional pulses are applied for
a maximum of 20 pulses. After the data is verified, one
25us pulse is applied to overprogram the byte so that
program margin is assured. This process is repeated
while sequencing through each address of the device.
When programming is completed, the data at all the
address is verified at VCC = VPP = 5V ± 10%.
The VCC supply of the MXIC On-Board Programming
Algorithm is designed to be 5V ± 10% particularly to
faciliate the programming operation under the on-board
application environment. But it can also be implemented
in an industrial-standard EPROM programmer.
COMPATIBILITY WITH MX27C1000 FAST PROGRAMMING
ALGORITHM
Besides the On-Board Programming Algorithm, the Fast
Programming Algorithm of MX27C1000 also applies to
MX26C1000A. MXIC Fast Algorithm is the conventional
EPROM programming algorithm and is available in
industrial-standard EPROM programmers. A user of
industrial-standard EPROM programmer can choose
either of the algorithms base on his preference.
The device is set up in the fast programming mode when
the programming voltage VPP = 12.75V is applted, with
VCC = 6.25V and PGM = VIL(or OE = VIH)(Algorithm
is shown in Figure 2). The programming is achieved
by applying a single TTL low level 25~100us pulse is
applied for a maximum of 25 pulses. This process is
repeated while sequencing through each address of the
device. When the programming mode is completed, the
data in all address is verified at VCC = VPP = 5V ± 10%.
ERASE MODE
The MX26C1000A is erased by an EPROM programmer
or in-system. The device is set up in erase mode when
the A9 = VPP = 12.75V are applied, with VCC = 5V and
PGM = VIL.(Algorithm shown in Figure 3). Erase time
is around 1sec. If the erase is not verified, an additional
erase processes will be repeated for a maximum of 200
times.
PROGRAM INHIBIT MODE
Programming of multiple MX26C1000s in parallel with
different data is also easily accomplished by using the
Program Inhibit Mode. Except for CE and OE, all like
inputs of the parallel MX26C1000 may be common. A
TTL low-level program pulse applied to an MX26C1000A
CE input with VPP = 12.75 ± 0.25 V and PGM LOW will
program that MX26C1000A. A high-level CE input
inhibits the other MX26C1000A from being programmed.
PROGRAM VERIFY MODE
Verification should be performed on the programmed bits
to determine that they were correctly programmed.
Verification should be performed with OE and CE, at VIL,
PGM at VIH, and VPP at its programming voltage.
ERASE VERIFY MODE
Verification should be performed on the erased chip to
determine that the whole chip(all bits) was correctly
erased. Verification should be performed with OE and
CE at VIL, PGM at VIH, and VCC = 5V, VPP = 12.5V
AUTO IDENTIFY MODE
The auto identify mode allows the reading out of a binary
code from an MTP that will identify its manufacturer and
device type. This mode is intended for use by the
programming equipment for the purpose of automatically
matching the device to be programmed with its
corresponding programming algorithm. This mode is
functional in the 25°C ± 5°C ambient temperature range
that is required when programming the MX26C1000A.
To activate this mode, the programming equipment must
force 12.75V on address line A9 of the device. Two
P/N: PM0454 Patent#: US#5,526,307
2
REV.1.5, FEB 10, 1998
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