DTA143TE Ver la hoja de datos (PDF) - ON Semiconductor

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componentes Descripción

Fabricante

DTA143TE

Digital Transistors (BRT) R1 = 4.7 kΩ, R2 = ∞ kΩ

ON Semiconductor 

MECHANICAL CASE OUTLINE

PACKAGE DIMENSIONS

SOT−1123

CASE 524AA

ISSUE C

DATE 29 NOV 2011

SCALE 8:1

D

−X−

−Y−

1

3

E

2

TOP VIEW

A

c

HE

SIDE VIEW

3X L2

e

b

0.08 X Y

NOTES:

1. DIMENSIONING AND TOLERANCING PER ASME

Y14.5M, 1994.

2. CONTROLLING DIMENSION: MILLIMETERS.

3. MAXIMUM LEAD THICKNESS INCLUDES LEAD

FINISH. MINIMUM LEAD THICKNESS IS THE

MINIMUM THICKNESS OF BASE MATERIAL.

4. DIMENSIONS D AND E DO NOT INCLUDE MOLD

FLASH, PROTRUSIONS, OR GATE BURRS.

MILLIMETERS

DIM MIN MAX

A 0.34 0.40

b 0.15 0.28

b1 0.10 0.20

c 0.07 0.17

D 0.75 0.85

E 0.55 0.65

e 0.35 0.40

HE 0.95 1.05

L 0.185 REF

L2 0.05 0.15

GENERIC

MARKING DIAGRAM*

2X b1

3X L

BOTTOM VIEW

XM

X = Specific Device Code

M = Date Code

SOLDERING FOOTPRINT*

1.20

3X 0.34

1

0.26

*This information is generic. Please refer

to device data sheet for actual part

marking.

Pb−Free indicator, “G” or microdot “ G”,

may or may not be present.

0.38 2X

0.20

PACKAGE

OUTLINE

DIMENSIONS: MILLIMETERS

*For additional information on our Pb−Free strategy and soldering

details, please download the ON Semiconductor Soldering and

Mounting Techniques Reference Manual, SOLDERRM/D.

STYLE 1:

PIN 1. BASE

2. EMITTER

3. COLLECTOR

STYLE 2:

PIN 1. ANODE

2. N/C

3. CATHODE

STYLE 3:

PIN 1. ANODE

2. ANODE

3. CATHODE

STYLE 4:

PIN 1. CATHODE

2. CATHODE

3. ANODE

STYLE 5:

PIN 1. GATE

2. SOURCE

3. DRAIN

DOCUMENT NUMBER:

DESCRIPTION:

98AON23134D

Electronic versions are uncontrolled except when accessed directly from the Document Repository.

Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.

SOT−1123, 3−LEAD, 1.0X0.6X0.37, 0.35P

PAGE 1 OF 1

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