IS61SP6436 Ver la hoja de datos (PDF) - Integrated Silicon Solution
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IS61SP6436 Datasheet PDF : 16 Pages
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IS61SP6436
ISSI®
READ CYCLE SWITCHING CHARACTERISTICS (Over Operating Range)
Symbol Parameter
-133
-117
-5
-6
-7
-8
Min. Max. Min. Max. Min. Max. Min. Max. Min. Max. Min. Max. Unit
tKC
Cycle Time
7.5 — 8.5 — 10 — 12 — 13 — 15 — ns
tKH
Clock High Time
2.8 — 3.0 — 3.5 — 4 — 4.5 — 5 — ns
tKL
Clock Low Time
2.8 — 3.0 — 3.5 — 4 — 4.5 — 5 — ns
tKQ
Clock Access Time
— 5 — 5 — 5 — 6 — 7 — 8 ns
tKQX(1) Clock High to Output Invalid
1.5 — 1.5 — 1.5 — 1.5 — 2 — 2 — ns
tKQLZ(1,3) Clock High to Output Low-Z
0 — 0 — 0 — 0 — 0 — 0 — ns
tKQHZ(1,3) Clock High to Output High-Z
1.5 5 1.5 6 1.5 6 1.5 6 2 6 2 6 ns
tOEQ
Output Enable to Output Valid
— 5 — 5 — 5 — 5 — 5 — 5 ns
tOEQX(1) Output Disable to Output Invalid
0 — 0 — 0 — 0 — 0 — 0 — ns
tOELZ(1,3) Output Enable to Output Low-Z
0 — 0 — 0 — 0 — 0 — 0 — ns
tOEHZ(1,3) Output Disable to Output High-Z
— 3 — 4 — 5 — 5 — 5 — 6 ns
tAS
Address Setup Time
2.5 — 2.5 — 2.5 — 2.5 — 2.5 — 2.5 — ns
tSS
Address Status Setup Time
2.5 — 2.5 — 2.5 — 2.5 — 2.5 — 2.5 — ns
tWS
Write Setup Time
2.5 — 2.5 — 2.5 — 2.5 — 2.5 — 2.5 — ns
tCES
Chip Enable Setup Time
2.5 — 2.5 — 2.5 — 2.5 — 2.5 — 2.5 — ns
tAVS
Address Advance Setup Time
2.5 — 2.5 — 2.5 — 2.5 — 2.5 — 2.5 — ns
tAH
Address Hold Time
0.5 — 0.5 — 0.5 — 0.5 — 0.5 — 0.5 — ns
tSH
Address Status Hold Time
0.5 — 0.5 — 0.5 — 0.5 — 0.5 — 0.5 — ns
tWH
Write Hold Time
0.5 — 0.5 — 0.5 — 0.5 — 0.5 — 0.5 — ns
tCEH
Chip Enable Hold Time
0.5 — 0.5 — 0.5 — 0.5 — 0.5 — 0.5 — ns
tAVH
Address Advance Hold Time
0.5 — 0.5 — 0.5 — 0.5 — 0.5 — 0.5 — ns
tCFG
Configuration Setup(2)
30 — 35 — 35 — 45 — 66.7 — 80 — ns
Note:
1. Guaranteed but not 100% tested. This parameter is periodically sampled.
2. Configuration Setup Mode is static and must not change during normal operation.
3. Tested with load in Figure 2.
8
Integrated Silicon Solution, Inc.
SR029-1C
08/11/99
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