MT8950AC Ver la hoja de datos (PDF) - Mitel Networks

Número de pieza

componentes Descripción

Fabricante

MT8950AC

ISO-CMOS ST-BUS™ FAMILY Data Codec

Mitel Networks 

ISO-CMOS MT8950

NRZ

Equivalent

Bipolar RZ

Equivalent

RxE

MARK

D

SPACE

MARK

D

SPACE

D

D

V

V

Establishes MARK polarity. See text for complete explanation.

DX1 Input

MARK Pulses

(Polarity

Established)

D

52 µs. Nom. or

104 µs. Nom. or

> 125 µs

4 µs. Min.

D

Tb Max.

DX2 Input

SPACE Pulses.

D

D

Tb = Bit Period

125 µs.

Min.

V

V

Signal Regenerated at Remote End

D

DR2 Output

MARK Pulses

DR1 Output

SPACE Pulses

V = Violations Pulse; D = Data Pulse D

D

35 µs. Nom.

52 µs. Nom. or

104 µs. Nom. or

> 125 µs

35 µs. Nom.

D

125 µs. Min.

125 µs.

Min.

V

V

Figure 4 - Example Input/Output Waveform in the RZ format (DF=HIGH)

word on the first rising edge of the clock after F1i

and CA are taken low. The 8 bit TEM word from

the input ST-BUS stream is clocked into the device

on the negative edge of the C2i clock. For proper

codec operation, the ST-BUS interface (DSTo, DSTi,

and CSTi) should be enabled for only 8 clock periods

of the C2i clock in any 125µs period (one ST-BUS

frame time) as shown in Figure 11. All data input

and output at the ST-BUS interface takes place at

2.048 Mbps.

DX1

NRZ Input

SPACE

MARK

DX2

Secondary

Input

Signal Regenerated at Remote End

52 µs. Nom. or

104 µs. Nom. or

> 125 µs

SPACE

125 µs.

Min.

125 µs. Min.

MARK

4 µs. Min.

121 µs. Max.

DR1

Data

Output

SPACE

MARK

SPACE

MARK

DR2

Secondary

Output

Each transition on this output denotes a pulse input at DX2 on the remote end

Figure 5 - Example Input/Output Waveform in the NRZ format (DF=LOW)

6-9

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