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MT8950AC Ver la hoja de datos (PDF) - Mitel Networks

Número de pieza
componentes Descripción
Fabricante
MT8950AC
Mitel
Mitel Networks Mitel
MT8950AC Datasheet PDF : 16 Pages
First Prev 11 12 13 14 15 16
ISO-CMOS MT8950
Codec converts analog signals into the ST-BUS
format while the Data Codec does a similar
conversion for low speed data. The information in
the ST-BUS format can be switched via the Digital
Switch to any of the other interfaces and
subsequently transmitted over the appropriate lines
to the remote destination. At the remote end, the
original signal is regenerated by another codec.
The remote equipment can be part of a local area
network or it may be accessed through leased T1/
CEPT digital lines. Access to remote equipment via
the T1/CEPT leased lines is acquired through the T1/
CEPT interface (MT8976). Full duplex transmission
at 1.544 or 2.048 Mbps is possible with this interface.
The Digital Network Interface Circuit (DNIC), the
MT8972, is capable of providing 160 kbps full duplex
transmission over single telephone pair wiring. This
device can support two 64 kbps channels, allowing
two data codecs to be interfaced to it at the remote
end. Simple, low cost data sets can be constructed
using the data codec and the DNIC.
A simplified interface for transmitting and receiving
RS-232 data signals is illustrated in Figure 9. The
Codec is selected to receive and transmit low speed
data in the NRZ format. The data transmitted by the
terminal equipment in the RS-232 format is inverted
and level shifted to TTL-compatible levels before
being fed into the DX1 input on the Codec. The
signal is converted into the ST-BUS format and
transmitted via the DSTo output in one channel
timeslot when the ST-BUS interface is enabled by
F1i and CA, as dictated by the system channel
assignment scheme. During this same time period
the Codec accepts the 8 bit data arriving on the
incoming ST-BUS stream which is output at the STo1
pin on the MT8980. The data is decoded and the
original signal input at the remote end is regenerated
and output at the DR1 pin. This signal is level
shifted, inverted and transmitted to the terminal. The
codec in this particular application requires no other
programming. Loading of the Control Register via
the CSTi input is optional. If this input is tied to
ground, the Codec will operate in mode 0 (the normal
mode). Note that the SCLK input is tied low. Thus
synchronization pulses will not be transmitted and
Digital Switch
MT8980
STi3
STi1
STo0
STo1
C4i
F0i
AAAAAAAAAAAAAAAAAAAAAAAAAAAAAMAAAAAAPAAAUAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAACAAATAAAiirAAAmcAAAuiAAAniAAAtgrAAAyAAAAAAAAAAAAAAA
AAAAAAAAAAAAAAAAAAAAAASAAAAIcnAAAAaAAAAtenAAAArAAAAfPAAAAaAAAAocAAAAienAAAAtAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAsCAAsCAAhiAAgiarAAncnAAumnAAietAAelAAnAAtAAAAAAAAAAAAAAAAAAAAAA
+ 5V
MT8950
1 CSTi
2 DSTi
VDD 24
23
NC
3 C2i
PRST 22
4 DSTo
NC 21
5 F1i
NC 20
6 CA
7 DF
8 RxE
DR1 19
DR2
DA
18
17
9
10
11
DX1
DX2
NRZo
SPo 16
SPi 15
DP 14
R
C
12 VSS
SCLK 13
Line Drivers
/Receivers
TxD
FROM
DTE
RS-232
TTL
RxD
R = 210 K
C = 1.0 µF
Figure 9 - Simplified RS-232 Interface using the Data Codec
6-13

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