MT8870D Ver la hoja de datos (PDF) - Mitel Networks
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MT8870D Datasheet PDF : 10 Pages
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MT88L70
tREC=tDP+tGTP
tID=tDA+tGTA
The value of tDP is a device parameter (see Figure 7)
and tREC is the minimum signal duration to be
recognized by the receiver. A value for C of 0.1 µF is
recommended for most applications, leaving R to be
selected by the designer.
VDD
VDD
St/GT
ESt
StD
C
vc
R
MT88L70
tGTA=(RC)In(VDD/VTSt)
tGTP=(RC)In[VDD/(VDD-VTSt)]
Figure 3 - Basic Steering Circuit
Different steering arrangements may be used to
select independently the guard times for tone
present (tGTP) and tone absent (tGTA). This may be
necessary to meet system specifications which place
both accept and reject limits on both tone duration
and interdigital pause. Guard time adjustment also
allows the designer to tailor system parameters such
as talk off and noise immunity. Increasing tREC
improves talk-off performance since it reduces the
probability that tones simulated by speech will
maintain signal condition long enough to be
registered. Alternatively, a relatively short tREC with a
long tDO would be appropriate for extremely noisy
environments where fast acquisition time and
immunity to tone drop-outs are required. Design
information for guard time adjustment is shown in
Figure 4.
Power-down and Inhibit Mode
A logic high applied to pin 6 (PWDN) will power down
the device to minimize the power consumption in a
standby mode. It stops the oscillator and the
functions of the filters.
Inhibit mode is enabled by a logic high input to the
pin 5 (INH). It inhibits the detection of tones
representing characters A, B, C, and D. The output
code will remain the same as the previous detected
code (see Table 1).
4-26
VDD
St/GT
tGTP=(RPC1) In [VDD / (VDD-VTSt)]
tGTA=(R1C1) In (VDD / VTSt)
C1
RP = (R1R2) / (R1 + R2)
R1 R2
ESt
a) decreasing tGTP; (tGTP < tGTA)
VDD
St/GT
tGTP=(R1C1) In [VDD / (VDD-VTSt)]
tGTA=(RPC1) In (VDD / VTSt)
C1
RP = (R1R2) / (R1 + R2)
R1 R2
ESt
b) decreasing tGTA; (tGTP > tGTA)
Figure 4 - Guard Time Adjustment
Differential Input Configuration
The input arrangement of the MT88L70 provides a
differential-input operational amplifier as well as a
bias source (VRef) which is used to bias the inputs at
mid-rail. Provision is made for connection of a
feedback resistor to the op-amp output (GS) for
adjustment of gain. In a single-ended configuration,
C1
R1
C2
R4
IN+
MT88L70
+
-
IN-
GS
R3
R5
R2
VRef
DIFFERNTIAL INPUT AMPLIFIER
C1 = C2 = 10 nF
R1 = R4 = R5 = 100 kΩ
R2 = 60 kΩ, R3, = 37.5 kΩ
R3 =
R2R5
R2 + R5
All resistors are ± 1% tolerance.
All capacitors are ± 5% tolerance.
R5
VOLTAGE GAIN (AV diff) = R1
INPUT IMPEDANCE
(ZINDIFF) = 2
R12 +
12
ωC
Figure 5 - Differential Input Configuration
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