AT28LV64B Ver la hoja de datos (PDF) - Atmel Corporation

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AT28LV64B

64K (8K x 8) Low-voltage Parallel EEPROM with Page Write and Software Data Protection

Atmel Corporation 

AC Read Characteristics

Symbol

tACC

tCE(1)

tOE(2)

tDF(3)(4)

tOH

Parameter

Address to Output Delay

CE to Output Delay

OE to Output Delay

CE or OE to Output Float

Output Hold from OE, CE or Address, whichever

occurred first

AC Read Waveforms(1)(2)(3)(4)

AT28LV64B

AT28LV64B-20

Min

Max

200

200

0

80

0

55

0

AT28LV64B-25

Min

Max

250

250

0

100

0

60

0

Units

ns

ns

ns

ns

ns

Notes:

1. CE may be delayed up to tACC - tCE after the address transition without impact on tACC.

2. OE may be delayed up to tCE - tOE after the falling edge of CE without impact on tCE or by tACC - tOE after an address change

without impact on tACC.

3. tDF is specified from OE or CE whichever occurs first (CL = 5 pF).

4. This parameter is characterized and is not 100% tested.

Input Test Waveforms and

Measurement Level

Output Test Load

tR, tF < 20 ns

Pin Capacitance

f = 1 MHz, T = 25°C(1)

Symbol

Typ

Max

CIN

COUT

Note:

4

6

8

12

1. This parameter is characterized and is not 100% tested.

Units

pF

pF

Conditions

VIN = 0V

VOUT = 0V

5

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