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AT28LV64B

64K (8K x 8) Low-voltage Parallel EEPROM with Page Write and Software Data Protection

Atmel Corporation 

The AT28LV64B is accessed like a static RAM for the read

or write cycle without the need for external components.

The device contains a 64 byte page register to allow writing

of up to 64 bytes simultaneously. During a write cycle, the

addresses and 1 to 64 bytes of data are internally latched,

freeing the address and data bus for other operations. Fol-

lowing the initiation of a write cycle, the device will automat-

ically write the latched data using an internal control timer.

The end of a write cycle can be detected by DATA polling of

I/O7. Once the end of a write cycle has been detected a

new access for a read or write can begin.

Atmel’s AT28LV64B has additional features to ensure high

quality and manufacturability. A software data protection

mechanism guards against inadvertent writes. The device

also includes an extra 64 bytes of EEPROM for device

identification or tracking.

Block Diagram

Absolute Maximum Ratings*

Temperature Under Bias................................ -55°C to +125°C

Storage Temperature ..................................... -65°C to +150°C

All Input Voltages

(including NC Pins)

with Respect to Ground ...................................-0.6V to +6.25V

All Output Voltages

with Respect to Ground .............................-0.6V to VCC + 0.6V

Voltage on OE and A9

with Respect to Ground ...................................-0.6V to +13.5V

*NOTICE:

Stresses beyond those listed under “Absolute

Maximum Ratings” may cause permanent dam-

age to the device. This is a stress rating only and

functional operation of the device at these or any

other conditions beyond those indicated in the

operational sections of this specification is not

implied. Exposure to absolute maximum rating

conditions for extended periods may affect

device reliability

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AT28LV64B

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