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MSP4408G

Multistandard Sound Processor

Micronas 

PRELIMINARY DATA SHEET

MSP 44x8G

Multistandard Sound Processor Family

1. Introduction

The MSP 44x8G family of Multistandard Sound Pro-

cessors covers the sound processing of all analog TV-

Standards worldwide, as well as the NICAM digital

sound standards. The full TV sound processing, start-

ing with analog sound IF signal-in, down to processed

analog AF-out, is performed on a single chip. Fig. 1–1

shows a simplified functional block diagram of the

MSP 44x8G.

The high-quality A/D and D/A converters offer the full

audio bandwidth of 20 kHz and the backend DSP pro-

cessing is performed at a 48 kHz sample rate.

The MSP 44x8G has been designed for the usage in

hybrid set-top boxes and multimedia applications. Its

asynchronous I2S slave interface allows the reception

of digital stereo signals with arbitrary sample rates

ranging from 5 to 50 kHz. Synchronization is per-

formed by means of an adaptive sample rate con-

verter.

This generation of TV sound processing ICs includes

versions for processing the multichannel television

sound (MTS) signal conforming to the standard recom-

mended by the Broadcast Television Systems Commit-

tee (BTSC). The DBX noise reduction, or alternatively,

Micronas Noise Reduction (MNR) is performed align-

ment free.

Other processed standards are the Japanese FM-FM

multiplex standard (EIA-J) and the FM Stereo Radio

standard.

The MSP 44x8G versions are pin and software com-

patible to other MSP families. Standard selection

requires only a single I2C transmission.

The MSP 44x8G has built-in automatic functions: The

IC is able to detect the actual sound standard automat-

ically (Automatic Standard Detection). Furthermore,

pilot levels and identification signals can be evaluated

internally with subsequent switching between mono/

stereo/bilingual; no I2C interaction is necessary (Auto-

matic Sound Selection).

The ICs are produced in submicron CMOS technology

and are available in the following packages: PQFP80,

PLQFP64, and PSDIP64.

Sound IF1

Sound IF2

I2S1

I2S2

I2S3

SCART1

SCART2

SCART3

SCART4

MONO

ADC

De-

modulator

Pre-

processing

synchron.

I2S

asychron.

I2S

Prescale

SCART

DSP

Input

Select

ADC

Prescale

Main

Sound

Processing

DAC

Aux

Sound

Processing

DAC

DAC

DAC

SCART

Output

Select

Main

Channel

Aux

Channel

I2S

SCART1

SCART2

Fig. 1–1: Simplified functional block diagram of the MSP 44x8G

Micronas

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