MSM7653 Ver la hoja de datos (PDF) - Oki Electric Industry
Número de pieza
componentes Descripción
Fabricante
MSM7653 Datasheet PDF : 36 Pages
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¡ Semiconductor
MSM7653
PIN DESCRIPTIONS (1/2)
Pin
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19, 20
21
22 to 27
28
29
30
31 to 38
39
I/O Symbol
Description
DVDD
3.3 V digital power supply
I
MS
Selects between Master and Slave at 27 MHz or 13.5 MHz YCbCr operation. Pulled down
I/O
SDA
I2C interface data bus
I
SCL
I2C interface clock bus
I2C-bus Slave address setting pin ("0" : 1001100 / "1" : 1001110).
I
ADRS
Pulled down
I
RESET_L System reset signal. Negative porality
I
MODE Broadcasting mode select pin. "0" : NTSC/"1" : PAL. Pulled down
I
OLC
Transparent control signal. "1" indicates overlay signal. Normally fixed to "0".
I
OLR
Overlay text color (Red component). Normally fixed to "0".
I
OLG
Overlay text color (Green component). Normally fixed to "0".
I
OLB
Overlay text color (Blue component). Normally fixed to "0".
O
CLKX1O 13.5 MHz divided clock output signal
I
OUTSEL Normally fixed to "0". Pulled down
DVDD
DGND
3.3 V digital power supply
Digital GND
Vertical sync signal input/output pin (ITU656: O, YCbCr: I/O)
I/O VSYNC_L
Negative polarity
Horizontal signal input/output pin (ITU656 : O, YCbCr: I/O)
I/O HSYNC_L
Negative polarity
Composite blank signal. Negative polarity. See the description on page 15
I
BLANK_L
for the operating requirement.
MSB 2 bits of 8-bit digital image data input pins (for ITU656 and
YCbCr 27 MHz). Level conforms to ITU-601.
I YD7 to YD6 MSB 2 bits of 8-bit digital image luminance signal input pins (for YCbCr).
Level conforms to ITU-601.
YD7 is MSB.
NC
Not connected
LSB 6 bits of 8-bit digital image data input pins (for ITU656 and
YCbCr 27 MHz). Level conforms to ITU-601.
I YD5 to YD0 LSB 6 bits of 8-bit digital image luminance signal input pins (for YCbCr).
Level conforms to ITU-601.
YD0 is LSB.
DGND Digital GND
DVDD
3.3 V digital power supply
I
CLKX2 Clock input pin (27 MHz)
8bit digital image chrominance signal data input pins (13.5 MHz mode).
I/O CD7 to CD0
Level conforms to ITU-601. Fixed to "0" for ITU Rec. 656, 27 MHz-YCbCr mode.
I
CLKSEL Operation mode select pin. "0" : 27 MHz mode / "1" : 13.5 MHz mode.
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