MSM6599BGS-K Ver la hoja de datos (PDF) - Oki Electric Industry

Número de pieza

componentes Descripción

Fabricante

MSM6599BGS-K

80-DOT SEGMENT DRIVER

Oki Electric Industry 

¡ Semiconductor

MSM6599B

FUNCTIONAL DESCRIPTION

Pin Functional Description

• EI, EO

These are enable pins. When a cascade connection is required, set the first MSM6599B's EI pin

at "L" level and connect EO pin to the next MSM6599B's EI pin. When a single MSM6599B is

used, EI should be set at "L" level.

• CP

Clock input pin for display data input. Data is clocked in the latch (I) at the falling edge of the

clock pulse. The clock pulse from this pin is active when the enable F/F is set, and inactive

when it is not set.

• LOAD

Input pin to latch the display data of one line stored in the latch (I). The latch (I) data is

transferred to the latch (II) at the falling edge. At this time, the control circuit to save the power

is reset and the display data of the next line can be stored.

• DF

Synchronous signal input pin for alternate signal for LCD driving . Frame inversion signal is

input to this pin.

• VDD, VSS

Power supply pins of the MSM6599B. VDD is generally set to 4.5V to 5.5V. VSS is the GND

pin, which is set to 0V.

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