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MSC1205

32-Bit Duplex Controller/Driver with Digital Dimming Function

Oki Electric Industry 

¡ Semiconductor

MSC1205

CLOCK Input

DATA is shifted at the rising edge of the clock.

LOAD Input

The contents of the shift register are shifted in while the LOAD input is "H" and latched at "H"

to "L" transition.

The LOAD signal is reproduced in the VF driver for the latch pulse for dimming data and

segment data.

After 10-bit dimming data and 64-bit segment data are transferred, input the LOAD signal prior

to the next clock.

Blank Function

A low-level voltage at the BLANK pin turns the display off (segment output = "L"). When

segment data transfer is finished, the display is turned on.

The relationship between this data transfer and the display is shown in Figure 2.

Initial Setting

When powered on (i.e., when the segment data has never been transferred) the display is turned

off (the segment output is "L").

When segment data transfer is finished, display is turned on. The relationship between this data

transfer and the display is shown in Figure 2.

VDD

DATA

LOAD

SEGn

DIMMING DATA

SEGMENT DATA

Display OFF

Display ON

Figure 2. Relationship Between Data Transfer and Display

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