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MPC905 Datasheet PDF : 7 Pages
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MOTOROLA
Freescale Semiconductor, Inc.
SEMICONDUCTOR TECHNICAL DATA
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DATA SHEET
1:6 PCI Clock Generator/Fanout
Buf1fe:6 r PCI Clock Generator/
Fanout Buffer
MPC905
MPC905
The MPC905 is a six output clock generation device targeted to
provide the clocks required in a 3.3V or 5.0V PCI environment. The
device operates from a 3.3V supply and can interface to either a TTL
input or an external crystal. The inputs to the device can be driven with
5.0V when the VCC is at 3.3V. The outputs of the MPC905 meet all of the
specifications of the PCI standard.
• Six Low Skew Outputs
• Synchronous Output Enables for Power Management
• Low Voltage Operation
• XTAL Oscillator Interface
• 16-Lead SOIC Package
• 5.0V Tolerant Enable Inputs
1:6 PCI
CLOCK GENERATOR/
FANOUT BUFFER
The MPC905 device is targeted for PCI bus or processor bus
environments with up to 12 clock loads. Each of the six outputs on the
16
MPC905 can drive two series terminated 50Ω transmission lines. This
1
capability effectively makes the MPC905 a 1:12 fanout buffer.
The MPC905 offers two synchronous enable inputs to allow users
flexibility in developing power management features for their designs.
Both enable signals are active HIGH inputs. A logic ‘0’ on the Enable1 will
D SUFFIX
PLASTIC SOIC PACKAGE
CASE 751B-05
pull outputs 0 to 4 into the logic ‘0’ state. A logic ‘1’ on the Enable1 input
will result in outputs 0 to 4 to be toggling. A logic ‘0’ on Enable2 will cause
output BLK5 to a logic ‘0’ state, whereas a logic ‘1’ on Enable2 will cause
output BLK5 to toggle. The oscillator remains on.
The Enable2 input can be used to disable any high power device for system power savings during periods of inactivity. Both
enable inputs are synchronized internal to the chip so that the output disabling will happen only when the outputs are already
LOW. This feature guarantees no runt pulses will be generated during enabling and disabling.
VDD (3) GND (3)
XTAL_IN
XTAL_OUT
Enable1
Enable2
SYNCHRONIZE
SYNCHRONIZE
BCLK0
BCLK1
BCLK2
BCLK3
BCLK4
BCLK5
Pinout: 16-Lead Plastic Package (Top View)
XTAL_OUT 1
Enable2 2
GND1 3
BCLK0 4
VDD1 5
BCLK1 6
GND2 7
BCLK2 8
16 XTAL_IN
15 Enable1
14 BCLK5
13 VDD3
12 BCLK4
11 GND3
10 BCLK3
9 VDD2
01/01
IDT™ 1:6 PCI Clock Generator/Fanout Buffer
© Motorola, Inc. 2001
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