MPC9449 Ver la hoja de datos (PDF) - Integrated Device Technology
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Fabricante
MPC9449 Datasheet PDF : 11 Pages
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MPC9449 Data Sheet
3.3V/2.5V 1:15 PECL/LVCMOS CLOCK FANOUT BUFFER
tSK(O)
VCC
VCC ÷ 2
GND
VCC
VCC ÷ 2
GND
The pin-to-pin skew is defined as the worst case difference in propagation delay be-
tween any similar delay path within a single device
Figure 8. Output-to-Output Skew tSK(O)
PCLK
PCLK
QX
VPP
t(LH)
t(HL)
VCMR
VCC
VCC ÷ 2
GND
Figure 10. Propagation Delay (tPD) Test Reference
CCLK
QX
VPP
t(LH)
t(HL)
VCC
VCC ÷ 2
GND
VCC
VCC ÷ 2
GND
Figure 9. Propagation Delay (tPD) Test Reference
CCLK
QX
t(LH)
t(HLt()HL)
VCC
VCC ÷ 2
GND
VCC
VCC ÷ 2
GND
tSK(P)= tPLH–tPLH
Figure 11. Propagation Delay tSK(P) Test Reference
VCC=3.3 V VCC=2.5 V
2.4
1.8 V
0.55
0.6 V
tF
tR
Figure 12. Output Transition Time Test Reference
TN
TN+1
TJIT(CC) = |TN -TN+1|
The variation in cycle time of a signal between adjacent cycles, over a ran-
dom sample of adjacent cycle pairs
Figure 13. Cycle-to-Cycle Jitter
Figure 14
MPC9449 REVISION 6 MARCH 15, 2016
8
©2016 Integrated Device Technology, Inc.
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