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MPC9140SD Datasheet PDF : 6 Pages
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MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
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1:18 LVCMOS Fanout Buffer
The MPC9140 is a 1:18 LVCMOS fanout buffer targeted to support
Intel based Pentium II™ microprocessor chip sets. The device features
18 low skew outputs optimized to drive the clock inputs of standard
unbuffered SDRAM modules. Standard unbuffered SDRAM modules
require four clocks per module allowing for the device to drive up to four
modules. The output buffers have been optimized to drive the load
presented by the SDRAM module.
The MPC9140 provides output shut off capabilities via an I2C serial
port for applications which plan to use fewer than four modules and desire
to minimize the power dissipation of the chip. Every output clock can be
individually enabled/disabled through fields in the I2C control registers.
After power up the default state is all outputs enabled. In applications
where this default state is acceptable the I2C ports need not be exercised.
• Supports Intel Pentium™ and Pentium II Processor Architectures
• 18 Skew Controlled 3.3V Compatible SDRAM Clocks
• I2C Serial Bus Interface
• Extensive Output Enable Control Capability
• Space Efficient 48–Lead SSOP Package
• Operating Temperature Range of 0°C to 70°C
• 3.3V ± 5% Power Supply
MPC9140
1:18 LVCMOS
FANOUT BUFFER
SD SUFFIX
48–LEAD PLASTIC SSOP PACKAGE
CASE 1215–01
NC 1
NC 2
VDD 3
SDRAM0 4
SDRAM1 5
VSS 6
VDD 7
SDRAM2 8
SDRAM3 9
VSS 10
BUF_IN 11
VDD2 12
SDRAM4 13
SDRAM5 14
VSS 15
VDD 16
SDRAM6 17
SDRAM7 18
VSS 19
VDD 20
SDRAM16 21
VSS 22
VDD 23
SDATA 24
48 NC
47 NC
46 VDD
45 SDRAM15
44 SDRAM14
43 VSS
42 VDD
41 SDRAM13
40 SDRAM12
39 VSS
38 OE
37 VDD
36 SDRAM11
35 SDRAM10
34 VSS
33 VDD
32 SDRAM9
31 SDRAM8
30 VSS
29 VDD
28 SDRAM17
27 VSS
26 VSS
25 SCLOCK
FUNCTION TABLE
OE
0
1
Figure 1. 48–Lead Pinout (Top View)
This document contains information on a product under development. Motorola reserves the right to change or
discontinue this product without notice.
6/97
© Motorola, Inc. 1997
1
REV 0.2
V1, V2
High–Z
1x BUF_IN
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