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MPC7447 Ver la hoja de datos (PDF) - Freescale Semiconductor

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componentes Descripción
Fabricante
MPC7447
Freescale
Freescale Semiconductor Freescale
MPC7447 Datasheet PDF : 60 Pages
First Prev 51 52 53 54 55 56 57 58 59 60
System Design Information
Due to the complexity and variety of system-level boundary conditions for today's microelectronic
equipment, the combined effects of the heat transfer mechanisms (radiation, convection, and conduction)
may vary widely. For these reasons, we recommend using conjugate heat transfer models for the board as
well as system-level designs.
For system thermal modeling, the MPC7448 thermal model is shown in Figure 26. Four volumes represent
this device. Two of the volumes, solder ball-air and substrate, are modeled using the package outline size
of the package. The other two, die and bump-underfill, have the same size as the die. The silicon die should
be modeled 8.0 × 7.3 × 0.86 mm3 with the heat source applied as a uniform source at the bottom of the
volume. The bump and underfill layer is modeled as 8.0 × 7.3 × 0.07 mm3collapsed in the z-direction with
a thermal conductivity of 5.0 W/(m • K) in the z-direction. The substrate volume is 25 × 25 × 1.14 mm3
and has 9.9 W/(m • K) isotropic conductivity in the xy-plane and 2.95 W/(m • K) in the direction of the
z-axis. The solder ball and air layer are modeled with the same horizontal dimensions as the substrate and
is 0.8 mm thick. For the LGA package the solder and air layer is 0.1 mm thick, but the material properties
are the same. It can also be modeled as a collapsed volume using orthotropic material properties:
0.034 W/(m • K) in the xy-plane direction and 11.2 W/(m • K) in the direction of the z-axis.
Conductivity
Value
Die (8.0 × 7.3 × 0.86 mm3)
Unit
Silicon
Temperature-
dependent
W/(m • K)
Bump and Underfill (8.0 × 7.3 × 0.07 mm3)
kz
5.0
W/(m • K)
Substrate (25 × 25 × 1.14 mm3)
kx
9.9
W/(m • K)
ky
9.9
kz
2.95
Solder Ball and Air (25 × 25 × 0.8 mm3)
kx
0.034
W/(m • K)
ky
0.034
kz
11.2
Die
z
Bump and Underfill
Substrate
Solder and Air
Side View of Model (Not to Scale)
x
Substrate
Die
y
Top View of Model (Not to Scale)
Figure 26. Recommended Thermal Model of MPC7448
MPC7448 RISC Microprocessor Hardware Specifications, Rev. 4
Freescale Semiconductor
51

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