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MM74HC4060 Ver la hoja de datos (PDF) - Fairchild Semiconductor

Número de pieza
componentes Descripción
Fabricante
MM74HC4060
Fairchild
Fairchild Semiconductor Fairchild
MM74HC4060 Datasheet PDF : 8 Pages
1 2 3 4 5 6 7 8
AC Electrical Characteristics
VCC = 5V, TA = 25°C, CL = 15 pF, tr = tf = 6 ns
Symbol
Parameter
Conditions
fMAX
tPHL, tPLH
tPHL, tPLH
tREM
tW
Maximum Clock Frequency
Maximum Propagation
Delay to Q4
Maximum Propagation
Delay to any Q
Minimum Reset
Removal Time
Minimum Pulse Width
(Note 5)
Guaranteed
Typ
Units
Limit
30
MHz
40
20
ns
16
40
ns
10
20
ns
10
16
ns
AC Electrical Characteristics
VCC = 2.0V to 6.0V, CL = 50 pF, tr = tf = 6 ns (unless otherwise specified)
Symbol
Parameter
Conditions
VCC
TA = 25°C
Typ
TA = −40 to 85°C TA = −55 to 125°C Units
Guaranteed Limits
fMAX
Maximum Operating
Frequency
2.0V
4.5V
6
5
30
24
4
MHz
20
MHz
6.0V
35
28
24
MHz
tPHL, tPLH Maximum Propagation
Delay Clock to Q4
2.0V
120
380
475
4.5V
42
76
95
6.0V
35
65
81
171
ns
114
ns
97
ns
tPHL
Maximum Propagation
Delay Reset to any Q
2.0V
72
240
302
4.5V
24
48
60
358
ns
72
ns
6.0V
20
41
51
61
ns
tPHL, tPLH Maximum Propagation
Delay Between Stages
2.0V
4.5V
125
156
25
31
188
ns
38
ns
tREM
Qn to Qn+1
Minimum Reset
Removal Time
6.0V
2.0V
4.5V
21
26
100
125
20
25
31
ns
150
ns
30
ns
6.0V
17
21
25
ns
tW
Minimum Pulse Width
2.0V
4.5V
80
100
16
20
120
ns
24
ns
6.0V
14
17
20
ns
tr, tf
Maximum Input Rise and
Fall Time
2.0V
4.5V
1000
500
1000
500
1000
ns
500
ns
6.0V
400
400
400
ns
tTHL, tTLH Maximum Output Rise
and Fall Time
2.0V
30
75
95
4.5V
10
15
19
110
ns
22
ns
6.0V
9
13
16
19
ns
CPD
Power Dissipation
(per package)
55
pF
Capacitance (Note 6)
CIN
Maximum Input
Capacitance
5
10
10
10
pF
Note 5: Typical Propagation delay time to any output can be calculated using: tP = 17+12(N–1) ns; where N is the number of the output, QW, at VCC = 5V.
Note 6: CPD determines the no load dynamic power consumption, PD = CPD VCC2 f+ICC VCC, and the no load dynamic current consumption,
IS = CPD VCC f + ICC.
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