ML9261 Ver la hoja de datos (PDF) - Oki Electric Industry
Número de pieza
componentes Descripción
Fabricante
ML9261 Datasheet PDF : 17 Pages
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¡ Semiconductor
AC Characteristics-1
Parameter
CLK Pulse Width
DIN Setup Time
DIN Hold Time
CLK-LS Setup Time
LS-CLK Setup Time
CLK-LS Hold Time
LS-CHG Setup Time
LS-CL Setup Time
LS Pulse Width
CHG Pulse Width
CL Pulse Width
DOUT Delay time
Driver Output Delay Time
Driver Output Slew Rate
AC Characteristics-2
Parameter
CLK Pulse Width
DIN Setup Time
DIN Hold Time
CLK-LS Setup Time
LS-CLK Setup Time
CLK-LS
LS-CHG Setup Time
LS-CL Setup Time
LS Pulse Width
CHG Pulse Width
CL Pulse Width
DOUT Delay time
Driver Output Delay Time
Driver Output Slew Rate
ML9261/62
Symbol
tW (CLK)
tSU (D-CLK)
tH (CLK-D)
tSU (CLK-LS)
tSU (LS-CLK)
tSU (L-CLK)
tH (CLK-L)
tSU (LS-CHG)
tSU (LS-CL)
tW (LS)
tW (CHG)
tW (CL)
tPD, tPRD
tDLH
tDHL
tDRHL
tTLH
tTHL
(VDD=4.5 to 5.5V, VDISP=40V, Ta=–40 to +85°C)
Condition
Min. Max. Unit
80 150 ns
50
— ns
50
— ns
50
— ns
During normal operation
50
— ns
At display data reset
50
— ns
At display data reset
50
— ns
50
— ns
50
— ns
80
— ns
10
— ms
10
— ms
Load: 30pF
—
Load: 2.0kW resistance in
—
parallel with 20pF capacitance —
—
50 ns
1.0 ms
1.0 ms
1.0 ms
Load: 2.0kW resistance in
—
parallel with 20pF capacitance —
5.0 ms
5.0 ms
Symbol
tW (CLK)
tSU (D-CLK)
tH (CLK-D)
tSU (CLK-LS)
tSU (LS-CLK)
tSU (L-CLK)
tH (CLK-L)
tSU (LS-CHG)
tSU (LS-CL)
tW (LS)
tW (CHG)
tW (CL)
tPD, tPRD
tDLH
tDHL
tDRHL
tTLH
tTHL
(VDD=3.0 to 3.6V, VDISP=40V, Ta=–40 to +85°C)
Condition
Min. Max. Unit
80 150 ns
50
— ns
50
— ns
50
— ns
During normal operation
50
— ns
At display data reset
50
— ns
At display data reset
50
— ns
50
— ns
50
— ns
80
— ns
10
— ms
10
— ms
Load: 30pF
—
Load: 2.0kW resistance in
—
parallel with 20pF capacitance —
50 ns
3.0 ms
3.0 ms
— 3.0 ms
Load: 2.0kW resistance in
—
parallel with 20pF capacitance —
5.0 ms
5.0 ms
10/16
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