MK2712S Ver la hoja de datos (PDF) - Integrated Circuit Systems
Número de pieza
componentes Descripción
Fabricante
MK2712S Datasheet PDF : 4 Pages
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Pin Assignment
ICLK 1
VDD 2
GND 3
NPCLK 4
8 FS0
7 PD
6 OE
5 FS1
8 pin SOIC
MK2712
NTSC/PAL Clock Source
Decoding Table
FS1 FS0 NPCLK (MHz) Error (ppm)
0
0
14.31818
0.3 ppm
0
1
17.73447
0.3 ppm
1
0
28.63636
0.3 ppm
1
1
35.46894
0.3 ppm
Pin Descriptions
Number Name
1
ICLK
2
VDD
3
GND
4 NPCLK
5
FS1
6
OE
7
PD
8
FS0
Type
I
P
P
O
I
I
I
I
Description
Input Clock. Connect to a 27.0000 MHz clock.
Connect to +3.3V or +5V.
Connect to ground.
NTSC or PAL output clock. Selected by FS1, FS0 per tables above.
Frequency Select pin #1. Selects NTSC or PAL frequency per table above.
Output Enable. Tri-states clock output when this input is low. Internal pull-up.
Power Down. Active low. Clocks stop low.
Frequency Select pin #0. Selects NTSC or PAL frequency per table above.
Key: I = Input, O = output, P = power supply connection
External Components/Crystal Selection
A minimum number of external components are required for proper oscillation. Connect a 27.000 MHz clock to
ICLK. A decoupling capacitor of 0.1µF should be connected between VDD and GND on pins 2 and 3, and a 33Ω
terminating resistor should be used on the clock output if the trace is longer than 1 inch.
MDS 2712 C
2
Revision 061401
Integrated Circuit Systems • 525 Race Street • San Jose • CA • 95126 • (408)295-9800tel • www.icst.com
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