MIC2085-JBQS(2004) Ver la hoja de datos (PDF) - Micrel
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componentes Descripción
Fabricante
MIC2085-JBQS Datasheet PDF : 28 Pages
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MIC2085/2086
Pin Description (Cont.)
Pin Number
MIC2086
4
Pin Number
MIC2085
4
Pin Name
ON
5
5
/POR
6
N/A
PWRGD
7
6
/FAULT
8
7
FB
9,10
8
11
9
GND
OV
12
10
COMPOUT
13
11
COMP+
14
12
COMP-
15
NA
DIS
16
13
REF
17
14
GATE
Micrel
Pin Function
ON Input: Active high. The ON pin, an input to a Schmitt-triggered compara-
tor used to enable/disable the controller, is compared to a VTH reference
with 100mV of hysteresis. Once a logic high is applied to the ON pin
(VON > 1.24V), a start-up sequence is initiated as the GATE pin starts
ramping up towards its final operating voltage. When the ON pin receives a
low logic signal (VON < 1.14V), the GATE pin is grounded and /FAULT is
high if VCC is above the UVLO threshold. ON must be low for at least 20µs
in order to initiate a start-up sequence. Additionally, toggling the ON pin
LOW to HIGH resets the circuit breaker.
Power-On Reset Output: Open drain N-Channel device, active low. This pin
remains asserted during start-up until a time period tPOR after the FB pin
voltage rises above the power-good threshold (VFB). The timing capacitor
CPOR determines tPOR. When an output undervoltage condition is detected
at the FB pin, /POR is asserted for a minimum of one timing cycle, tPOR. The
/POR pin has a weak pull-up to VCC.
Power-Good Output: Open drain N-Channel device, active high. When the
voltage at the FB pin is lower than 1.24V, the PWRGD output is held low.
When the voltage at the FB pin is higher than 1.24V, then PWRGD is
asserted. A pull-up resistor connected to this pin and to VCC will pull the
output up to VCC. The PWRGD pin has a weak pull-up to VCC.
Circuit Breaker Fault Status Output: Open drain N-Channel device, active
low. The /FAULT pin is asserted when the circuit breaker trips due to an
overcurrent condition. Also, this pin indicates undervoltage lockout and
overvoltage fault conditions. The /FAULT pin has a weak pull-up to VCC.
Power-Good Threshold Input: This input is internally compared to a 1.24V
reference with 3mV of hysteresis. An external resistive divider may be used
to set the voltage at this pin. If this input momentarily goes below 1.24V,
then /POR is activated for one timing cycle, tPOR, indicating an output
undervoltage condition. The /POR signal de-asserts one timing cycle after
the FB pin exceeds the power-good threshold by 3mV. A 5µs filter on this pin
prevents glitches from inadvertently activating this signal.
Ground Connection: Tie to analog ground.
OV Input: When the voltage on OV exceeds its trip threshold, the GATE pin
is pulled low and the CRWBR timer starts. If OV remains above its threshold
long enough for CRWBR to reach its trip threshold, the circuit breaker is
tripped. Otherwise, the GATE pin begins to ramp up one POR timing cycle
after OV drops below its trip threshold.
Uncommitted Comparator’s Open Drain Output.
Comparator’s Non-Inverting Input.
Comparator’s Inverting Input.
Discharge Output: When the MIC2086 is turned off, a 550Ω internal resistor
at this output allows the discharging of any load capacitance to ground.
Reference Output: 1.24V nominal. Tie a 0.1µF capacitor to ground to ensure
stability.
Gate Drive Output: Connects to the gate of an external N-Channel
MOSFET. An internal clamp ensures that no more than 13V is applied
between the GATE pin and the source of the external MOSFET. The GATE
pin is immediately brought low when either the circuit breaker trips or an
undervoltage lockout condition occurs.
January 2004
3
M0235-121903
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