MCP625 Ver la hoja de datos (PDF) - Microchip Technology
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MCP625 Datasheet PDF : 44 Pages
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MCP621/2/5
DIGITAL ELECTRICAL SPECIFICATIONS (CONTINUED)
Electrical Characteristics: Unless otherwise indicated, TA = +25°C, VDD = +2.5V to +5.5V, VSS = GND, VCM = VDD/2,
VOUT ≈ VDD/2, VL = VDD/2, RL = 2 kΩ to VL, CL = 50 pF and CAL/CS = VSS (refer to Figure 1-1 and Figure 1-2).
Parameters
Sym Min Typ Max Units
Conditions
CAL/CS Input Current, Low
CAL/CS High Specifications
ICSL
—
0
—
nA CAL/CS = 0V
CAL/CS Logic Threshold, High
VIH 0.8VDD
VDD
V
CAL/CS Input Current, High
ICSH
—
0.7
—
µA CAL/CS = VDD
GND Current
ISS
-3.5 -1.8
—
µA Single, CAL/CS = VDD = 2.5V
ISS
-8
-4
—
µA Single, CAL/CS = VDD = 5.5V
ISS
-5
-2.5
—
µA Dual, CAL/CS = VDD = 2.5V
ISS
-10
-5
—
µA Dual, CAL/CS = VDD = 5.5V
CAL/CS Internal Pull Down Resistor RPD
—
5
—
MΩ
Amplifier Output Leakage
POR Dynamic Specifications
IO(LEAK)
—
50
—
nA CAL/CS = VDD, TA = 125°C
VDD Low to Amplifier Off Time
(output goes High-Z)
VDD High to Amplifier On Time
(including calibration)
tPOFF
—
200
—
ns G = +1 V/V, VL = VSS,
VDD = 2.5V to 0V step to VOUT = 0.1 (2.5V)
tPON
100
200
300
ms G = +1 V/V, VL = VSS,
VDD = 0V to 2.5V step to VOUT = 0.9 (2.5V)
CAL/CS Dynamic Specifications
CAL/CS Input Hysteresis
VHYST
—
0.25
—
V
CAL/CS Setup Time
(between CAL/CS edges)
tCSU
1
—
—
µs G = +1 V/V, VL = VSS (Notes 2, 3)
CAL/CS = 0.8VDD to VOUT = 0.1 (VDD/2)
CAL/CS High to Amplifier Off Time
tCOFF
—
200
—
ns G = +1 V/V, VL = VSS,
(output goes High-Z)
CAL/CS = 0.8VDD to VOUT = 0.1 (VDD/2)
CAL/CS Low to Amplifier On Time
tCON
—
5
(including calibration)
8
ms G = +1 V/V, VL = VSS,
CAL/CS = 0.2VDD to VOUT = 0.9 (VDD/2)
Note 1: The MCP622 has its CAL/CS input internally pulled down to VSS (0V).
2: This time ensures that the internal logic recognizes the edge. However, for the rising edge case, if CAL/CS is raised
before the calibration is complete, the calibration will be aborted and the part will return to low power mode.
3: For the MCP625 dual, there is an additional constraint. CALA/CSA and CALB/CSB can be toggled simultaneously
(within a time much smaller than tCSU) to make both op amps perform the same function simultaneously. If they are
toggled independently, then CALA/CSA (CALB/CSB) cannot be allowed to toggle while op amp B (op amp A) is in
calibration mode; allow more than the maximum tCON time (8 ms) before the other side is toggled.
TEMPERATURE SPECIFICATIONS
Electrical Characteristics: Unless otherwise indicated, all limits are specified for: VDD = +2.5V to +5.5V, VSS = GND.
Parameters
Sym Min Typ Max Units
Conditions
Temperature Ranges
Specified Temperature Range
TA
-40
— +125 °C
Operating Temperature Range
TA
-40
— +125 °C (Note 1)
Storage Temperature Range
TA
-65
— +150 °C
Thermal Package Resistances
Thermal Resistance, 8L-3x3 DFN
θJA
—
60
— °C/W (Note 2)
Thermal Resistance, 8L-SOIC
θJA
— 140.9 — °C/W
Thermal Resistance, 10L-3x3 DFN
θJA
—
57
— °C/W (Note 2)
Thermal Resistance, 10L-MSOP
θJA
—
202
— °C/W
Note 1: Operation must not cause TJ to exceed Maximum Junction Temperature specification (150°C).
2: Measured on a standard JC51-7, four layer printed circuit board with ground plane and vias.
© 2009 Microchip Technology Inc.
DS22188A-page 5
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