MCM6209CP15 Ver la hoja de datos (PDF) - Motorola => Freescale
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MCM6209CP15 Datasheet PDF : 8 Pages
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WRITE CYCLE 1 (W Controlled, See Notes 1, 2, and 3)
– 12
– 15
– 20
– 25
– 35
Parameter
Symbol Min Max Min Max Min Max Min Max Min Max Unit
Write Cycle Time
tAVAV 12 — 15 — 20 — 25 — 35 —
ns
Address Setup Time
Address Valid to End of Write
tAVWL 0
—
0
—
0
—
0
—
0
—
ns
tAVWH 10 — 12 — 15 — 20 — 20 —
ns
Write Pulse Width
tWLWH, 10 — 12 — 15 — 20 — 20 —
ns
tWLEH
Write Pulse Width, G High
tWLWH, 8
— 10 — 12 — 15 — 15 —
ns
tWLEH
Data Valid to End of Write
tDVWH 6
—
7
—
8
— 10 — 10 —
ns
Data Hold Time
Write Low to Output High–Z
Write High to Output Active
tWHDX 0
—
0
—
0
—
0
—
0
—
ns
tWLQZ 0
6
0
7
0
8
0 10 0 10 ns
tWHQX 4
—
4
—
4
—
4
—
4
—
ns
Write Recovery Time
tWHAX 0
—
0
—
0
—
0
—
0
—
ns
NOTES:
1. A write occurs during the overlap of E low and W low.
2. For Output Enable devices, if G goes low coincident with or after W goes low, the output will remain in a high impedance state.
3. All timings are referenced from the last valid address to the first transitioning address.
4. For Output Enable devices, if G ≥ VIH, the output will remain in a high impedance state
5. At any given voltage and temperature, tWLQZ max is less than tWHQX min, both for a given device and from device to device.
6. Transition is measured ± 500 mV from steady–state voltage with load of Figure 1B.
7. This parameter is sampled and not 100% tested.
Notes
3
4
5, 6, 7
5, 6, 7
A (ADDRESS)
E (CHIP ENABLE)
W (WRITE ENABLE)
D (DATA IN)
Q (DATA OUT)
WRITE CYCLE 1 (W Controlled, See Note 2)
tAVAV
tAVWH
tAVWL
HIGH–Z
tWLQZ
tWLWH
tWLEH
tDVWH
DATA VALID
HIGH–Z
tWHAX
tWHDX
tWHQX
MOTOROLA FAST SRAM
MCM6209C
5
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