MCH1214(2004) Ver la hoja de datos (PDF) - ON Semiconductor
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MCH1214 Datasheet PDF : 4 Pages
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MCH12140, MCK12140
DC CHARACTERISTICS (VEE = VEE(min) − VEE(max); VCC = GND, unless otherwise noted.)
−40°C
0°C
25°C
70°C
Characteristic
Symbol Min Typ Max Min Typ Max Min Typ Max Min Typ Max Unit
Power Supply Current H IEE
K
−
45 −
38 45 52 38 45 52 38 45 52 mA
−
45 −
38 45 52 38 45 52 42 50 58
Power Supply Voltage H VEE
K
−4.75 −5.2 −5.5 −4.75 −5.2 −5.5 −4.75 −5.2 −5.5 −4.75 −5.2 −5.5 V
−4.20 −4.5 −5.5 −4.20 −4.5 −5.5 −4.20 −4.5 −5.5 −4.20 −4.5 −5.5
Input HIGH Current
IIH
−
− 150 −
− 150 −
− 150 −
− 150 mA
AC CHARACTERISTICS (VEE = VEE(min) − VEE(max); VCC = GND, unless otherwise noted.)
−40°C
0°C
25°C
70°C
Characteristic
Maximum Toggle Frequen-
cy
Symbol Min Typ Max Min Typ Max Min
FMAX
− 800 − 650 800 − 650
Typ Max Min Typ Max Unit
800 − 650 800 −
−
Propagation Delay R to D tPLH
to Output
R to U tPHL
V to D
V to U
− 440 − 320 440 580 320 440 580 360 480 620 ps
− 330 − 210 330 470 210 330 470 240 360 500
− 330 − 210 330 470 210 330 470 240 360 500
− 440 − 320 440 580 320 440 580 360 480 620
Output Rise/Fall Times
tr
Q (20 to 80%)
tf
ps
− 225 − 100 225 350 100 225 350 100 225 350
APPLICATIONS INFORMATION
The 12140 is a high speed digital circuit used as a phase
comparator in an analog phase-locked loop. The device
determines the “lead” or “lag” phase relationship and time
difference between the leading edges of a VCO (V) signal
and a Reference (R) input. Since these edges occur only once
per cycle, the detector has a range of ±2p radians.
The operation of the 12140 can best be described using the
plots of Figure 2. Figure 2 plots the average value of U, D
and the difference between U and D versus the phase
difference between the V and R inputs.
There are four potential relationships between V and R: R
lags or leads V and the frequency of R is less than or greater
than the frequency of V. Under these four conditions the
12140 will function as follows:
R lags V in phase
When the R and V inputs are equal in frequency and the
phase of R lags that of V the U output will stay HIGH while
the D output will pulse from HIGH to LOW. The magnitude
of the pulse will be proportional to the phase difference
between the V and R inputs reaching a minimum 50% duty
cycle under a 180° out of phase condition. The signal on D
indicates to the VCO to decrease in frequency to bring the
loop into lock.
V frequency > R frequency
When the frequency of V is greater than that of R the
12140 behaves in a similar fashion as above. Again the
signal on D indicates that the VCO frequency must be
decreased to bring the loop into lock.
Fv > Fr
−2p
−2p
R lags V U R leads V
−p
p
D
−p
p
U−D
Fv < Fr
VOH
VOH − VOL
2p
2
VOH
VOH − VOL
2p
2
VOH − VOL
2
−2p
−p
p
2p
VOL − VOH
2
Figure 2. Average Output Voltage vs. Phase Difference
R leads V in phase
When the R and V inputs are equal in frequency and the
phase of R leads that of V the D output will stay HIGH while
the U output pulses from HIGH to LOW. The magnitude of
the pulse will be proportional to the phase difference
between the V and R inputs reaching a minimum 50% duty
cycle under a 180° out of phase condition. The signal on U
indicates to the VCO to increase in frequency to bring the
loop into lock.
V frequency < R frequency
When the frequency of V is less than that of R the 12140
behaves in a similar fashion as above. Again the signal on U
indicates that the VCO frequency must be decreased to bring
the loop into lock.
From Figure 2 when V and R are at the same frequency and
in phase the value of U − D is zero thus providing a zero error
voltage to the VCO. This situation indicates the loop is in lock
and the 12140 action will maintain the loop in its locked state.
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