Preliminary Electrical Characteristics
CLKOUT
CSn
A[23:0]
TSIZ[1:0]
TS
TIP
B6a
B8
B8
B8
OE
R/W (H)
BS[3:2]
D[31:16]
TA (H)
S0 S1 S2 S3 S4 S5 S0 S1 S2 S3 S4 S5
B7a
B6a
B8
B7a
B9
B9
B9
B8
B9
B6c
B7
B8
B6b
B6b
B7
B4
B11
B5
B0
B9
B7
B12
B13
TEA (H)
Figure 8. Read/Write (Internally Terminated) SRAM Bus Timing
Figure 9 shows a bus cycle terminated by TA showing timings listed in Table 13.
MCF5275 Integrated Microprocessor Family Hardware Specification, Rev. 2
26
Preliminary—Subject to Change Without Notice
Freescale Semiconductor