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MCF51JM128

ColdFire Microcontroller

Freescale Semiconductor 

MCF51JM128 Family Configurations

1.3.1 Feature List

• 32-Bit Version 1 ColdFire® Central Processor Unit (CPU)

— Up to 50.33 MHz at 2.7 V – 5.5 V

— Performance (Dhrystone 2.1):

– 0.94 Dhrystone 2.1 MIPS per MHz when running from internal RAM

– 0.76 Dhrystone 2.1 MIPS per MHz when running from flash

— Implements Instruction Set Revision C (ISA_C)

— Supports up to 30 peripheral interrupt requests and seven software interrupts

• On-chip memory

— Up to 128 KBytes Flash memory with read/program/erase over full operating voltage and temperature range

— Up to 16 KBytes static random access memory (RAM)

— Security circuitry to prevent unauthorized access to RAM and flash contents

• Power-saving modes

— Two low-power stop plus wait modes

— Peripheral clock enable register can disable clocks to unused modules, thereby reducing currents; this behavior

allows clocks to remain enabled to specific perhipherals in Stop3 mode

— Very lower power real-time counter for use in run, wait, and stop modes with internal and external clock sources

• Four Clock Source Options

— Oscillator (XOSC) — Loop-control Pierce oscillator; crystal or ceramic resonator range of 31.25 kHz to 38.4 kHz

or 1 MHz to 16 MHz

— FLL/PLL controlled by internal or external reference

— Trimmable internal reference allows 0.2% resolution and 2% deviation

• System protection features

— Watchdog computer operating properly (COP) reset with option to run from dedicated 1 kHz internal clock source

or bus clock

— Low-voltage detection with reset or interrupt; selectable trip points

— Illegal opcode and illegal address detection with programmable reset or exception response

— Flash block protection

• Debug support

— Single-wire Background debug interface

— 4 Program Counters plus two address (optional data) breakpoint registers with programmable 1- or 2-level trigger

response

— 64-entry processor status and debug data trace buffer with programmable start/stop conditions

• Universal Serial Bus (USB) On-The-Go dual-role controller

— Full-speed USB device controller

– Fully compliant with USB specification 1.1 and 2.0

– 16 bidirectional endpoints, with double buffering to provide the maximum throughput

– Supports control, bulk, interrupt, and isochronous endpoints

– Supports bus-powered capability with low-power consumption

— Full-speed / low-speed host controller

– Host mode allows control, bulk, interrupt, and isochronous transfers

— OTG protocol logic

— On-chip USB transceiver

— On-chip 3.3 V USB regulator and pull-up resistors save system cost

MCF51JM128 ColdFire Microcontroller, Rev. 3

6

Freescale Semiconductor

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