MC33411A Ver la hoja de datos (PDF) - Motorola => Freescale
Número de pieza
componentes Descripción
Fabricante
MC33411A Datasheet PDF : 43 Pages
| |||
ÁÁÁÁÁÁPÁÁÁin ÁÁÁÁÁÁSymÁÁÁboÁÁÁl/TypÁÁÁe ÁÁÁÁÁÁÁÁÁÁÁÁPIÁÁÁN FUÁÁÁDNesCÁÁÁcTriIpOMtÁÁÁiNoCnDÁÁ3ÁE3S4ÁÁCÁ1R1IÁÁPÁAT/IOBÁÁÁN (ÁÁÁconÁÁtÁinuÁÁeÁd) ÁÁÁÁÁÁÁÁÁDÁÁÁescÁÁrÁiptiÁÁoÁn ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
10
EN
Tx PLL
Enable Input for the MCU Interface section.
(Input)
VCC
Hysteresis threshold is within 0.5 V of ground and
VCC. See text for proper waveform required at this
pin.
10
240
Enable
≈1.0 µA
11
CLK
Same as Pin 10.
(Input)
12
Data
(I/O)
13
MCU Clk Out
(Output)
12
240
Data
1.0 µA
Tx PLL
VCC
Tx PLL
VCC
Disable
Data
Tx PLL
VCC
Tx PLL
VCC
1.0 k
13
Clk Out
14
Gnd Digital
NOTE: 1. All VCC pins must be within ±0.5 V of each other.
Clock Input for the MCU Interface section.
Hysteresis threshold is within 0.5 V of ground and
VCC. Data is written or read out on clock’s rising
edge. Maximum clock rate is 2.0 MHz.
Data I/O line for the MCU Interface section. Both
address and data are provided to/from this pin.
Input threshold is within 0.5 V of ground and VCC.
Data is written or read out on clock’s rising edge.
The microprocessor clock output is derived from the
reference oscillator and a programmable divider
with divide ratios of 2 to 312.5. It can be used to
drive a microprocessor and thereby reduce the
number of crystals required in the system design.
The driver has an internal resistor in series with the
output which can be combined with an external
capacitor to form a low–pass filter to reduce
radiated noise on the PCB. This output also
functions as the output for the counter test modes.
1) For the MC33411A the Clk Out can be disabled
via the MCU interface.
2) For the MC33411B this output is always active
(on).
Ground for the Data, MCU Clk Out, and Fref Out
digital Outputs. A direct connection to the ground
plane is strongly recommended.
10
MOTOROLA RF/IF DEVICE DATA
Share Link: 