MC26LS30D Ver la hoja de datos (PDF) - ON Semiconductor
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MC26LS30D Datasheet PDF : 14 Pages
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MC26LS30
ELECTRICAL CHARACTERISTICS (EIA−422−A differential mode, Pin 4 p 0.8 V, −40°C tTA t 85°C, 4.75 V p VCC p 5.25 V,
VEE = Gnd, unless otherwise noted. Pin numbers refer to SO−16 package only.)
Characteristic
Symbol
Min
Typ
Max
Unit
Output Voltage (see Figure 1)
Differential, RL = ∞, VCC = 5.25 V
Differential, RL = 100 Ω, VCC = 4.75 V
Change in Differential Voltage, RL = 100 Ω (Note 4)
Offset Voltage, RL = 100 Ω
Change in Offset Voltage*, RL = 100 Ω
Output Current (each output)
Power Off Leakage, VCC = 0, −10 V p VO p +10 V
High Impedance Mode, VCC = 5.25 V, −10 V p VO p +10 V
Short Circuit Current (Note 2)
High Output Shorted to Pin 5 (TA = 25°C)
High Output Shorted to Pin 5 (−40°C t TA t+85°C)
Low Output Shorted to +6.0 V (TA = 25°C)
Low Output Shorted to +6.0 V (−40°C t TA t +85°C)
Inputs
Low Level Voltage
High Level Voltage
Current @ Vin = 2.4 V
Current @ Vin = 15 V
Current @ Vin = 0.4 V
Current, 0 p Vin p 15 V, VCC = 0
Clamp Voltage (Iin = −12 mA)
Power Supply Current (VCC = +5.25 V, Outputs Open)
(0 p Enable p VCC)
VOD1
VOD2
∆VOD2
VOS
∆VOS
IOLK
IOZ
ISC−
ISC−
ISC+
ISC+
VIL
VIH
IIH
IIHH
IIL
IIX
VIK
ICC
−
2.0
−
−
−
−100
−100
−150
−150
60
50
−
2.0
−
−
−200
−
−1.5
−
4.2
2.6
10
2.5
10
0
0
−95
−
75
−
−
−
0
0
−8.0
0
−
16
6.0
−
400
3.0
400
+100
+100
−60
−50
150
150
0.8
−
40
100
−
−
−
30
Vdc
Vdc
mVdc
Vdc
mVdc
µA
mA
Vdc
Vdc
µA
Vdc
mA
TIMING CHARACTERISTICS (EIA−422−A differential mode, Pin 4 p 0.8 V, TA = 25°C, VCC = 5.0 V, VEE = Gnd, (Notes 1 and 3)
unless otherwise noted.)
Characteristic
Symbol
Min
Typ
Max
Unit
Differential Output Rise Time (Figure 3)
Differential Output Fall Time (Figure 3)
Propagation Delay Time − Input to Differential Output
Input Low to High (Figure 3)
Input High to Low (Figure 3)
Skew Timing (Figure 3)
tPDH to tPDL for Each Driver
Max to Min tPDH Within a Package
Max to Min tPDL Within a Package
Enable Timing (Figure 4)
Enable to Active High Differential Output
Enable to Active Low Differential Output
Enable to 3−State Output From Active High
Enable to 3−State Output From Active Low
tr
tf
tPDH
tPDL
tSK1
tSK2
tSK3
tPZH
tPZL
tPHZ
tPLZ
−
70
200
ns
−
70
200
ns
ns
−
90
200
−
90
200
ns
−
9.0
−
−
2.0
−
−
2.0
−
ns
−
150
300
−
190
350
−
80
350
−
110
300
1. All voltages measured with respect to Pin 5.
2. Only one output shorted at a time, for not more than 1 second.
3. Typical values established at +25°C, VCC = +5.0 V, VEE = −5.0 V.
4. Vin switched from 0.8 to 2.0 V.
5. Imbalance is the difference between VO2 with Vin t 0.8 V and VO2 with Vin u 2.0 V.
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