MC100EL51 Ver la hoja de datos (PDF) - ON Semiconductor
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MC100EL51 Datasheet PDF : 9 Pages
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MC10EL51, MC100EL51
R1
D2
R
D
8 VCC
7Q
CLK 3
6Q
CLK 4
5 VEE
Figure 1. Logic Diagram and Pinout Assignment
Table 1. TRUTH TABLE
D*
R*
CLK*
Q**
L
L
Z
L
H
L
Z
H
X
H
X
L
Z = LOW to HIGH Transition
* Pin will default low when left open.
**Pin will default low when inputs are left open.
Table 2. PIN DESCRIPTION
PIN
FUNCTION
R
D
CLK, CLK
Q, Q
VCC
VEE
EP
ECL Reset Input
ECL Data Input
ECL Clock Inputs
ECL Data Outputs
Positive Supply
Negative Supply
Exposed pad must be connected
to a sufficient thermal conduit.
Electrically connect to the most
negative supply or leave floating
open.
Table 3. MAXIMUM RATINGS
Symbol
Parameter
Condition 1
Condition 2
Rating
Unit
VCC
PECL Mode Power Supply
VEE
NECL Mode Power Supply
VI
PECL Mode Input Voltage
NECL Mode Input Voltage
Iout
Output Current
VEE = 0 V
VCC = 0 V
VEE = 0 V
VCC = 0 V
Continuous
Surge
TA
Operating Temperature Range
Tstg
Storage Temperature Range
qJA
Thermal Resistance (Junction−to−Ambient) 0 lfpm
500 lfpm
VI VCC
VI VEE
8 SOIC
8 SOIC
8
−8
6
−6
50
100
−40 to +85
−65 to +150
190
130
V
V
V
V
mA
mA
°C
°C
°C/W
°C/W
qJC
Thermal Resistance (Junction−to−Case)
Standard Board
8 SOIC
qJA
Thermal Resistance (Junction−to−Ambient) 0 lfpm
500 lfpm
8 TSSOP
8 TSSOP
41 to 44
185
140
°C/W
°C/W
°C/W
qJC
Thermal Resistance (Junction−to−Case)
Standard Board
8 TSSOP
qJA
Thermal Resistance (Junction−to−Ambient) 0 lfpm
500 lfpm
DFN8
DFN8
41 to 44 ± 5%
129
84
°C/W
°C/W
°C/W
Tsol
Wave Solder
Pb <2 to 3 sec @ 248°C
Pb−Free <2 to 3 sec @ 260°C
265
°C
265
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
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