MC100LVELT22(2016) Ver la hoja de datos (PDF) - ON Semiconductor
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MC100LVELT22 Datasheet PDF : 9 Pages
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Q0 1
Q0 2
LVPECL
Q1 3
MC100LVELT22
8 VCC
7 D0
LVTTL/
LVCMOS
6 D1
Table 1. PIN DESCRIPTION
PIN
Qn, Qn
D0, D1
VCC
GND
FUNCTION
LVPECL Differential Outputs
LVTTL/LVCMOS Inputs
Positive Supply
Ground
Q1 4
5 GND
Figure 1. 8−Lead Pinout (Top View) and Logic Diagram
Table 2. ATTRIBUTES
Characteristics
Internal Input Pulldown Resistor
Internal Input Pullup Resistor
ESD Protection
Human Body Model
Machine Model
Moisture Sensitivity, Indefinite Time Out of Drypack (Note 1)
SOIC−8
TSSOP−8
Flammability Rating
Oxygen Index: 28 to 34
Transistor Count
Meets or exceeds JEDEC Spec EIA/JESD78 IC Latchup Test
1. For additional information, see Application Note AND8003/D.
Value
N/A
N/A
> 4 kV
> 200 V
Level 1
Level 3
UL 94 V−0 @ 0.125 in
164
Table 3. MAXIMUM RATINGS
Symbol
Parameter
Condition 1
Condition 2
Rating
Unit
VCC
Positive Power Supply
VI
Input Voltage
Iout
Output Current
GND = 0 V
GND = 0 V
Continuous
Surge
VI VCC
7
V
7
V
50
mA
100
mA
TA
Operating Temperature Range
Tstg
Storage Temperature Range
qJA
Thermal Resistance (Junction−to−Ambient) 0 lfpm
500 lfpm
SO−8
SO−8
−40 to +85
−65 to +150
190
130
°C
°C
°C/W
°C/W
qJC
Thermal Resistance (Junction−to−Case)
std bd
qJA
Thermal Resistance (Junction−to−Ambient) 0 lfpm
500 lfpm
SO−8
TSSOP−8
TSSOP−8
41 to 44 ± 5%
185
140
°C/W
°C/W
°C/W
qJC
Thermal Resistance (Junction−to−Case)
std bd
TSSOP−8
41 to 44 ± 5%
°C/W
Tsol
Wave Solder
Pb−Free <2 to 3 sec @ 260°C
265
°C
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
2. JEDEC standard multilayer board − 2S2P (2 signal, 2 power)
www.onsemi.com
2
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