MC100LVEL92DWG(2016) Ver la hoja de datos (PDF) - ON Semiconductor

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componentes Descripción

Fabricante

MC100LVEL92DWG
(Rev.:2016)

5V Triple PECL Input to LVPECL Output Translator

ON Semiconductor 

MC100LVEL92

VCC Q0 Q0 LVCC Q1 Q1 LVCC Q2 Q2 VCC

20 19 18 17 16 15 14 13 12 11

LVPECL

LVPECL

LVPECL

PECL

PECL

PECL

1 2 3 4 5 6 7 8 9 10

VCC D0 D0

D1 D1

D2 D2 GND

Table 1. PIN DESCRIPTION

PIN

Dn, Dn

Qn, Qn

PECL VBB

LVCC

VCC

GND

FUNCTION

PECL Inputs

LVPECL Outputs

PECL Reference Voltage Output

LVPECL Power Supply

PECL Power Supply

Common Ground Rail

Warning: All VCC, LVCC, and GND pins must be externally connected

to Power Supply to guarantee proper operation.

Figure 1. Logic Diagram and Pinout: SO−20 WB (Top View)

Table 2. MAXIMUM RATINGS

Symbol

Parameter

Condition 1

Condition 2

Rating

Unit

VCC

LVCC

VI

Iout

PECL Power Supply

LVPECL Power Supply

PECL Input Voltage

Output Current

GND = 0 V

GND = 0 V

GND = 0 V

Continuous

Surge

VI ≤ VCC

8 to 0

V

8 to 0

V

6 to 0

V

50

mA

100

IBB

PECL VBB Sink/Source

TA

Operating Temperature Range

Tstg

Storage Temperature Range

qJA

Thermal Resistance (Junction-to-Ambient) 0 lfpm

500 lfpm

SOIC−20 WB

± 0.5

−40 to +85

−65 to +150

90

60

mA

°C

°C

°C/W

qJC

Thermal Resistance (Junction-to-Case)

Tsol

Wave Solder (Pb-Free)

Standard Board

SOIC−20 WB

< 2 to 3 sec @ 260°C

30 to 35

265

°C/W

°C

Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality

should not be assumed, damage may occur and reliability may be affected.

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