MC100LVEL37DWG Ver la hoja de datos (PDF) - ON Semiconductor

Número de pieza

componentes Descripción

Fabricante

MC100LVEL37DWG

3.3V ECL 1:4 ÷1/÷2 Clock Fanout Buff

ON Semiconductor 

MC100LVEL37

ORDERING INFORMATION

Device

Package

Shipping†

MC100LVEL37DW

SO−20 WB

38 Units / Rail

MC100LVEL37DWG

SO−20 WB

(Pb−Free)

38 Units / Rail

MC100LVEL37DWR2

SO−20 WB

1000 / Tape & Reel

MC100LVEL37DWR2G

SO−20 WB

(Pb−Free)

1000 / Tape & Reel

†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging

Specifications Brochure, BRD8011/D.

Resource Reference of Application Notes

AN1405/D − ECL Clock Distribution Techniques

AN1406/D − Designing with PECL (ECL at +5.0 V)

AN1503/D − ECLinPSt I/O SPiCE Modeling Kit

AN1504/D − Metastability and the ECLinPS Family

AN1568/D − Interfacing Between LVDS and ECL

AN1672/D − The ECL Translator Guide

AND8001/D − Odd Number Counters Design

AND8002/D − Marking and Date Codes

AND8020/D − Termination of ECL Logic Devices

AND8066/D − Interfacing with ECLinPS

AND8090/D − AC Characteristics of ECL Devices

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