MC100LVEL37DW(2000) Ver la hoja de datos (PDF) - ON Semiconductor

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MC100LVEL37DW
(Rev.:2000)

3.3V ECL 1:4 ÷1/÷2 Clock Fanout Buffer

ON Semiconductor 

MC100LVEL37

3.3VĄECL 1:4 ÷1/÷2 Clock

Fanout Buffer

The MC100LVEL37 is a fully differential 1:4 fanout buffer. The

device offers two outputs at ÷1 of the input frequency, and two outputs

at ÷2 of the input frequency. The Low Output–Output Skew of the

device makes it ideal for distributing 1x and 1/2x frequency

synchronous signals.

The differential inputs have special circuitry which ensures device

stability under open input conditions. When both differential inputs

are left open the CLKn input will pull down to VEE, The CLKn input

will bias around VCC/2 and the Qn output will go LOW.

• 700 ps Typical Propagation Delays

• 50 ps Maximum Output–Output Skews

• ESD Protection: >2 KV HBM, >200 V MM

• The 100 Series Contains Temperature Compensation

• PECL Mode Operating Range: VCC= 3.0 V to 3.8 V

with VEE= 0 V

• NECL Mode Operating Range: VCC= 0 V

with VEE= –3.0 V to –3.8 V

• Internal Input Pulldown Resistors

• Qn Output will Default LOW with Inputs Open or at VEE

• Meets or Exceeds JEDEC Spec EIA/JESD78 IC Latchup Test

• Moisture Sensitivity Level 1

For Additional Information, see Application Note AND8003/D

• Flammability Rating: UL–94 code V–0 @ 1/8”,

Oxygen Index 28 to 34

• Transistor Count = 256 devices

http://onsemi.com

20

1

SO–20

DW SUFFIX

CASE 751D

MARKING

DIAGRAM*

20

100LVEL37

AWLYYWW

1

A = Assembly Location

WL = Wafer Lot

YY = Year

WW = Work Week

*For additional information, see Application Note

AND8002/D

ORDERING INFORMATION

Device

Package Shipping

MC100LVEL37DW

SO–20 38 Units/Rail

MC100LVEL37DWR2 SO–20 1000 Units/Reel

© Semiconductor Components Industries, LLC, 2000

1

October, 2000 – Rev. 2

Publication Order Number:

MC100LVEL37/D

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